2015-04-06 06:30:48 +01:00
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* FIXME audit
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2015-04-06 11:26:24 +01:00
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* Remove vload/store etc..
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* Replace vset with a call to merge.
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* Replace vset with a call to merge.
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2015-04-03 09:28:58 +01:00
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* Conditional execution Subset, where etc...
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* Coordinate information, integers etc...
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* Integer type padding/union to vector.
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2015-04-06 06:30:48 +01:00
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* LatticeCoordinate[mu]
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2015-04-03 09:28:58 +01:00
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* Optimise the extract/merge SIMD routines
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* Broadcast, reduction tests.
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* QDP++ regression suite and comparative benchmark
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* NERSC Lattice loading, plaquette test
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* Conformable test in Cshift routines.
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* Gamma/Dirac structures
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* Fourspin, two spin project
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* Stencil operator support
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* Check for missing functionality
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* I/O support
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- MPI IO?
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- BinaryWriter, TextWriter etc...
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- protocol buffers?
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-
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2015-04-06 11:26:24 +01:00
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// Cartesian grid inheritance
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// Grid::GridBase
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// |
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// __________|___________
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// | |
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// Grid::GridCartesian Grid::GridCartesianRedBlack
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//
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// TODO: document the following as an API guaranteed public interface
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/*
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* Rough map of functionality against QDP++ Layout
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*
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* Param | Grid | QDP++
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* -----------------------------------------
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* | |
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* void | oSites, iSites, lSites | sitesOnNode
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* void | gSites | vol
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* | |
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* gcoor | oIndex, iIndex | linearSiteIndex // no virtual node in QDP
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* lcoor | |
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*
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* void | CheckerBoarded | - // No checkerboarded in QDP
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* void | FullDimensions | lattSize
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* void | GlobalDimensions | lattSize // No checkerboarded in QDP
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* void | LocalDimensions | subgridLattSize
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* void | VirtualLocalDimensions | subgridLattSize // no virtual node in QDP
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* | |
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* int x 3 | oiSiteRankToGlobal | siteCoords
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* | ProcessorCoorLocalCoorToGlobalCoor |
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* | |
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* vector<int> | GlobalCoorToRankIndex | nodeNumber(coord)
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* vector<int> | GlobalCoorToProcessorCoorLocalCoor| nodeCoord(coord)
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* | |
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* void | Processors | logicalSize // returns cart array shape
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* void | ThisRank | nodeNumber(); // returns this node rank
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* void | ThisProcessorCoor | // returns this node coor
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* void | isBoss(void) | primaryNode();
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* | |
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* | RankFromProcessorCoor | getLogicalCoorFrom(node)
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* | ProcessorCoorFromRank | getNodeNumberFrom(logical_coord)
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*/
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// Work out whether to permute
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// ABCDEFGH -> AE BF CG DH permute wrap num
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//
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// Shift 0 AE BF CG DH 0 0 0 0 ABCDEFGH 0 0
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// Shift 1 BF CG DH AE 0 0 0 1 BCDEFGHA 0 1
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// Shift 2 CG DH AE BF 0 0 1 1 CDEFGHAB 0 2
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// Shift 3 DH AE BF CG 0 1 1 1 DEFGHABC 0 3
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// Shift 4 AE BF CG DH 1 1 1 1 EFGHABCD 1 0
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// Shift 5 BF CG DH AE 1 1 1 0 FGHACBDE 1 1
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// Shift 6 CG DH AE BF 1 1 0 0 GHABCDEF 1 2
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// Shift 7 DH AE BF CG 1 0 0 0 HABCDEFG 1 3
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// Suppose 4way simd in one dim.
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// ABCDEFGH -> AECG BFDH permute wrap num
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// Shift 0 AECG BFDH 0,00 0,00 ABCDEFGH 0 0
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// Shift 1 BFDH CGEA 0,00 1,01 BCDEFGHA 0 1
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// Shift 2 CGEA DHFB 1,01 1,01 CDEFGHAB 1 0
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// Shift 3 DHFB EAGC 1,01 1,11 DEFGHABC 1 1
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// Shift 4 EAGC FBHD 1,11 1,11 EFGHABCD 2 0
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// Shift 5 FBHD GCAE 1,11 1,10 FGHABCDE 2 1
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// Shift 6 GCAE HDBF 1,10 1,10 GHABCDEF 3 0
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// Shift 7 HDBF AECG 1,10 0,00 HABCDEFG 3 1
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// Generalisation to 8 way simd, 16 way simd required.
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//
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// Need log2 Nway masks. consisting of
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// 1 bit 256 bit granule
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// 2 bit 128 bit granule
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// 4 bits 64 bit granule
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// 8 bits 32 bit granules
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//
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// 15 bits....
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// TODO
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//
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// Base class to share common code between vRealF, VComplexF etc...
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//
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// lattice Broad cast assignment
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//
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// where() support
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// implement with masks, and/or? Type of the mask & boolean support?
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//
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// Unary functions
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// cos,sin, tan, acos, asin, cosh, acosh, tanh, sinh, // Scalar<vReal> only arg
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// exp, log, sqrt, fabs
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//
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// transposeColor, transposeSpin,
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// adjColor, adjSpin,
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// traceColor, traceSpin.
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// peekColor, peekSpin + pokeColor PokeSpin
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//
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// copyMask.
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//
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// localMaxAbs
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//
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// norm2,
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// sumMulti equivalent.
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// Fourier transform equivalent.
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//
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