2018-01-12 23:25:02 +00:00
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/*************************************************************************************
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2016-03-28 16:24:37 +01:00
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Grid physics library, www.github.com/paboyle/Grid
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Source file: ./lib/simd/Avx512Asm.h
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Copyright (C) 2015
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Author: paboyle <paboyle@ph.ed.ac.uk>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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2018-01-12 23:25:02 +00:00
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*************************************************************************************/
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/* END LEGAL */
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2016-03-28 16:24:37 +01:00
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#ifndef GRID_ASM_AV512_H
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#define GRID_ASM_AV512_H
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////////////////////////////////////////////////////////////
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// Knights Landing specials
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////////////////////////////////////////////////////////////
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#define ZLOADf(OFF,PTR,ri,ir) VLOADf(OFF,PTR,ir) VSHUFf(ir,ri)
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#define ZLOADd(OFF,PTR,ri,ir) VLOADd(OFF,PTR,ir) VSHUFd(ir,ri)
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#define ZMULf(Ari,Air,B,Criir,Ciirr) VMULf(Ari,B,Criir) VMULf(Air,B,Ciirr)
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#define ZMULd(Ari,Air,B,Criir,Ciirr) VMULd(Ari,B,Criir) VMULd(Air,B,Ciirr)
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#define ZMADDf(Ari,Air,B,Criir,Ciirr) VMADDf(Ari,B,Criir) VMADDf(Air,B,Ciirr)
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#define ZMADDd(Ari,Air,B,Criir,Ciirr) VMADDd(Ari,B,Criir) VMADDd(Air,B,Ciirr)
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#define ZENDf(Criir,Ciirr, tmp) ZEND1f(Criir,Ciirr, tmp) ZEND2f(Criir,Ciirr, tmp)
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#define ZENDd(Criir,Ciirr, tmp) ZEND1d(Criir,Ciirr, tmp) ZEND2d(Criir,Ciirr, tmp)
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2018-01-12 23:25:02 +00:00
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#define ZMULMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMULMEMf(O,P,B,Biirr) \
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VMULMEMf(O,P,C,Ciirr) \
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VMULf(tmp,B,Briir) \
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VMULf(tmp,C,Criir)
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2018-01-12 23:25:02 +00:00
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#define ZMULMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMd(O,P,tmp) \
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VMULMEMd(O,P,B,Biirr) \
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VMULMEMd(O,P,C,Ciirr) \
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VMULd(tmp,B,Briir) \
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VMULd(tmp,C,Criir)
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2018-01-12 23:25:02 +00:00
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#define ZMADDMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMADDMEMf(O,P,B,Biirr) \
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VMADDMEMf(O,P,C,Ciirr) \
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VMADDf(tmp,B,Briir) \
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VMADDf(tmp,C,Criir)
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#define ZMADDMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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2018-01-12 23:25:02 +00:00
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VSHUFMEMd(O,P,tmp) \
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VMADDMEMd(O,P,B,Biirr) \
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VMADDMEMd(O,P,C,Ciirr) \
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VMADDd(tmp,B,Briir) \
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2016-03-28 16:24:37 +01:00
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VMADDd(tmp,C,Criir)
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// Merges accumulation for complex dot chain; less efficient under avx512
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2018-01-12 23:25:02 +00:00
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#define ZEND1f(Criir,Ciirr, tmp) "vshufps $0xb1," #Criir "," #Criir "," #tmp ";\n" \
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"vaddps " #tmp "," #Criir "," #Criir"{%k6}" ";\n"
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2018-01-12 23:25:02 +00:00
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#define ZEND2f(Criir,Ciirr, tmp) "vshufps $0xb1," #Ciirr "," #Ciirr "," #tmp ";\n" \
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"vsubps " #tmp "," #Ciirr "," #Criir"{%k7}" ";\n"
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2016-03-28 16:24:37 +01:00
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#define ZEND1d(Criir,Ciirr, tmp) "vshufpd $0x55," #Criir "," #Criir "," #tmp ";\n"\
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"vaddps " #tmp "," #Criir "," #Criir"{%k6}" ";\n"
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2016-03-28 16:24:37 +01:00
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2018-01-12 23:25:02 +00:00
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#define ZEND2d(Criir,Ciirr, tmp) "vshufpd $0x55," #Ciirr "," #Ciirr "," #tmp ";\n" \
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"vsubpd " #tmp "," #Ciirr "," #Criir"{%k7};\n" // ri+ir ; ri+ir,rr-ii
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2016-03-29 00:55:22 +01:00
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#define VMOVRDUPd(OFF,A,DEST) "vpshufd $0x44," #OFF "*64(" #A ")," #DEST ";\n" // 32 bit level: 1,0,3,2
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#define VMOVIDUPd(OFF,A,DEST) "vpshufd $0xee," #OFF "*64(" #A ")," #DEST ";\n" // 32 bit level: 3,2,3,2
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#define VMOVRDUPf(OFF,PTR,DEST) "vmovsldup " #OFF "*64(" #PTR "), " #DEST ";\n"
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#define VMOVIDUPf(OFF,PTR,DEST) "vmovshdup " #OFF "*64(" #PTR "), " #DEST ";\n"
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2016-06-03 11:24:26 +01:00
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#define VRDUPd(SRC,DEST) "vpshufd $0x44," #SRC"," #DEST ";\n" // 32 bit level: 1,0,3,2
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#define VRDUPf(SRC,DEST) "vmovsldup " #SRC ", " #DEST ";\n"
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#define VIDUPd(SRC,DEST) "vpshufd $0xee," #SRC"," #DEST ";\n" // 32 bit level: 3,2,3,2
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#define VIDUPf(SRC,DEST) "vmovshdup " #SRC ", " #DEST ";\n"
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2016-12-08 16:43:28 +00:00
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#define VBCASTRDUPd(OFF,A,DEST) "vbroadcastsd (" #OFF "*16+0)(" #A ")," #DEST ";\n"
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#define VBCASTIDUPd(OFF,A,DEST) "vbroadcastsd (" #OFF "*16+8)(" #A ")," #DEST ";\n"
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#define VBCASTRDUPf(OFF,PTR,DEST) "vbroadcastss (" #OFF "*8 +0)(" #PTR "), " #DEST ";\n"
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#define VBCASTIDUPf(OFF,PTR,DEST) "vbroadcastss (" #OFF "*8 +4)(" #PTR "), " #DEST ";\n"
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#define VBCASTCDUPf(OFF,A,DEST) "vbroadcastsd (" #OFF "*64 )(" #A ")," #DEST ";\n"
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#define VBCASTZDUPf(OFF,A,DEST) "vbroadcastf32x4 (" #OFF "*64 )(" #A ")," #DEST ";\n"
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#define VBCASTCDUP(OFF,A,DEST) VBCASTCDUPf(OFF,A,DEST)
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#define VBCASTZDUP(OFF,A,DEST) VBCASTZDUPf(OFF,A,DEST)
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2016-06-03 11:24:26 +01:00
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2016-03-29 00:55:22 +01:00
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#define VMADDSUBf(A,B,accum) "vfmaddsub231ps " #A "," #B "," #accum ";\n"
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#define VMADDSUBd(A,B,accum) "vfmaddsub231pd " #A "," #B "," #accum ";\n"
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#define VMADDSUBMEMf(O,P,B,accum) "vfmaddsub231ps " #O"*64("#P "),"#B "," #accum ";\n"
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#define VMADDSUBMEMd(O,P,B,accum) "vfmaddsub231pd " #O"*64("#P "),"#B "," #accum ";\n"
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2016-12-08 16:43:28 +00:00
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#define VMADDRDUPf(O,P,B,accum) "vfmadd231ps (" #O"*8+0)("#P "){1to16},"#B "," #accum ";\n"
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#define VMADDIDUPf(O,P,B,accum) "vfmadd231ps (" #O"*8+4)("#P "){1to16},"#B "," #accum ";\n"
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2016-06-03 11:24:26 +01:00
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#define VMADDSUBRDUPf(O,P,B,accum) "vfmaddsub231ps (" #O"*8+0)("#P "){1to16},"#B "," #accum ";\n"
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#define VMADDSUBIDUPf(O,P,B,accum) "vfmaddsub231ps (" #O"*8+4)("#P "){1to16},"#B "," #accum ";\n"
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#define VMULRDUPf(O,P,B,accum) "vmulps (" #O"*8+0)("#P "){1to16},"#B "," #accum ";\n"
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#define VMULIDUPf(O,P,B,accum) "vmulps (" #O"*8+4)("#P "){1to16},"#B "," #accum ";\n"
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2016-12-08 16:43:28 +00:00
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#define VMADDRDUPd(O,P,B,accum) "vfmadd231pd (" #O"*16+0)("#P "){1to8},"#B "," #accum ";\n"
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#define VMADDIDUPd(O,P,B,accum) "vfmadd231pd (" #O"*16+8)("#P "){1to8},"#B "," #accum ";\n"
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2016-06-03 11:24:26 +01:00
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#define VMADDSUBRDUPd(O,P,B,accum) "vfmaddsub231pd (" #O"*16+0)("#P "){1to8},"#B "," #accum ";\n"
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#define VMADDSUBIDUPd(O,P,B,accum) "vfmaddsub231pd (" #O"*16+8)("#P "){1to8},"#B "," #accum ";\n"
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#define VMULRDUPd(O,P,B,accum) "vmulpd (" #O"*16+0)("#P "){1to8},"#B "," #accum ";\n"
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#define VMULIDUPd(O,P,B,accum) "vmulpd (" #O"*16+8)("#P "){1to8},"#B "," #accum ";\n"
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2018-01-12 23:25:02 +00:00
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/*
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* TimesI is used only in the XP recon
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* Could zero the regs and use RECON_ACCUM
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*/
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2016-03-29 00:55:22 +01:00
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2016-03-28 16:24:37 +01:00
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#define VTIMESI0f(A,DEST, Z) VSHUFf(A,DEST)
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#define VTIMESI1f(A,DEST, Z) "vaddps " #DEST "," #Z "," #DEST"{%k6}" ";\n"
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#define VTIMESI2f(A,DEST, Z) "vsubps " #DEST "," #Z "," #DEST"{%k7}" ";\n"
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#define VTIMESI0d(A,DEST, Z) VSHUFd(A,DEST)
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#define VTIMESI1d(A,DEST, Z) "vaddpd " #DEST "," #Z "," #DEST"{%k6}" ";\n"
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#define VTIMESI2d(A,DEST, Z) "vsubpd " #DEST "," #Z "," #DEST"{%k7}" ";\n"
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#define VTIMESMINUSI0f(A,DEST,Z) VSHUFf(A,DEST)
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#define VTIMESMINUSI1f(A,DEST,Z) "vsubps " #DEST "," #Z "," #DEST"{%k6}" ";\n"
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#define VTIMESMINUSI2f(A,DEST,Z) "vaddps " #DEST "," #Z "," #DEST"{%k7}" ";\n"
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#define VTIMESMINUSI0d(A,DEST,Z) VSHUFd(A,DEST)
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#define VTIMESMINUSI1d(A,DEST,Z) "vsubpd " #DEST "," #Z "," #DEST"{%k6}" ";\n"
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#define VTIMESMINUSI2d(A,DEST,Z) "vaddpd " #DEST "," #Z "," #DEST"{%k7}" ";\n"
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2016-06-03 11:24:26 +01:00
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#if 0
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2016-03-28 16:24:37 +01:00
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#define VACCTIMESMINUSI0f(A,ACC,tmp) VSHUFf(A,tmp)
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#define VACCTIMESMINUSI1f(A,ACC,tmp) "vsubps " #tmp "," #ACC "," #ACC"{%k6}" ";\n"
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#define VACCTIMESMINUSI2f(A,ACC,tmp) "vaddps " #tmp "," #ACC "," #ACC"{%k7}" ";\n"
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#define VACCTIMESMINUSI0d(A,ACC,tmp) VSHUFd(A,tmp)
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#define VACCTIMESMINUSI1d(A,ACC,tmp) "vsubpd " #tmp "," #ACC "," #ACC"{%k6}" ";\n"
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#define VACCTIMESMINUSI2d(A,ACC,tmp) "vaddpd " #tmp "," #ACC "," #ACC"{%k7}" ";\n"
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#define VACCTIMESI0f(A,ACC,tmp) VSHUFf(A,tmp)
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#define VACCTIMESI1f(A,ACC,tmp) "vaddps " #tmp "," #ACC "," #ACC"{%k6}" ";\n"
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#define VACCTIMESI2f(A,ACC,tmp) "vsubps " #tmp "," #ACC "," #ACC"{%k7}" ";\n"
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#define VACCTIMESI0d(A,ACC,tmp) VSHUFd(A,tmp)
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#define VACCTIMESI1d(A,ACC,tmp) "vaddpd " #tmp "," #ACC "," #ACC"{%k6}" ";\n"
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#define VACCTIMESI2d(A,ACC,tmp) "vsubpd " #tmp "," #ACC "," #ACC"{%k7}" ";\n"
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2016-06-03 11:24:26 +01:00
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#else
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// o_p must point to floating 1.0f/d
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//
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// Ai, Ar -> tmp (r i)
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// tmp *1.0
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// ACC i - Ar ; ACC r + Ai
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#define VACCTIMESMINUSI0f(A,ACC,tmp) VSHUFf(A,tmp)
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#define VACCTIMESMINUSI1f(A,ACC,tmp) VMADDMEMf(1,%r10,tmp,ACC)
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#define VACCTIMESMINUSI2f(A,ACC,tmp)
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#define VACCTIMESMINUSI0d(A,ACC,tmp) VSHUFd(A,tmp)
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#define VACCTIMESMINUSI1d(A,ACC,tmp) VMADDMEMd(1,%r10,tmp,ACC)
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#define VACCTIMESMINUSI2d(A,ACC,tmp)
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// Ai, Ar -> tmp (r i)
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// tmp *1.0
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// ACC i + Ar ; ACC r - Ai
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#define VACCTIMESI0f(A,ACC,tmp) VSHUFf(A,tmp)
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#define VACCTIMESI1f(A,ACC,tmp) VMADDMEMf(0,%r10,tmp,ACC)
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#define VACCTIMESI2f(A,ACC,tmp)
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#define VACCTIMESI0d(A,ACC,tmp) VSHUFd(A,tmp)
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#define VACCTIMESI1d(A,ACC,tmp) VMADDMEMd(0,%r10,tmp,ACC)
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#define VACCTIMESI2d(A,ACC,tmp)
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#endif
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2016-03-28 16:24:37 +01:00
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#define VPERM0f(A,B) "vshuff32x4 $0x4e," #A "," #B "," #B ";\n"
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#define VPERM1f(A,B) "vshuff32x4 $0xb1," #A "," #B "," #B ";\n"
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#define VPERM2f(A,B) "vshufps $0x4e," #A "," #B "," #B ";\n"
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#define VPERM3f(A,B) "vshufps $0xb1," #A "," #B "," #B ";\n"
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#define VPERM0d(A,B) "vshuff64x2 $0x4e," #A "," #B "," #B ";\n"
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#define VPERM1d(A,B) "vshuff64x2 $0xb1," #A "," #B "," #B ";\n"
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#define VPERM2d(A,B) "vshufpd $0x55," #A "," #B "," #B ";\n"
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#define VPERM3d(A,B) VMOVd(A,B)
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#endif
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