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Adding pdf generation capabilities
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@ -1,5 +1,4 @@
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---
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layout: single
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title : "Documentation"
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author_profile: false
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excerpt: "Supported SIMD architectures"
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@ -22,6 +21,7 @@ The following options can be used for `--enable-simd=` flag to target different
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| `AVXFMA4` | AVX (256 bit) + FMA4 |
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| `AVX2` | AVX 2 (256 bit) |
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| `AVX512` | AVX 512 bit |
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| `NEONv8` | [ARM NEON](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/ch07s03.html) (128 bit)
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| `QPX` | QPX (256 bit) |
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Alternatively, some CPU codenames can be directly used:
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@ -34,10 +34,12 @@ Alternatively, some CPU codenames can be directly used:
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#### Notes (Jan 2018):
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- Support for the AVX512 for Intel and GCC>=6. Clang still to be tested.
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- For BG/Q only [bgclang](http://trac.alcf.anl.gov/projects/llvm-bgq) is supported. We do not presently plan to support more compilers for this platform.
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- BG/Q performances are currently rather poor. This is being investigated for future versions.
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- The vector size for the `GEN` target can be specified with the `configure` script option `--enable-gen-simd-width`.
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* We currently support AVX512 for the Intel compiler and GCC (KNL and SKL target). Support for clang will appear in future
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versions of Grid when the AVX512 support in the compiler is more advanced.
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* For BG/Q only [bgclang](http://trac.alcf.anl.gov/projects/llvm-bgq) is supported. We do not presently plan to support more compilers for this platform.
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* BG/Q performances are currently rather poor. This is being investigated for future versions.
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* The vector size for the `GEN` target can be specified with the `configure` script option `--enable-gen-simd-width`.
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{% include paginator.html %}
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