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clean up
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6013183361
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@ -26,9 +26,9 @@ Author: Nils Meyer <nils.meyer@ur.de> Regensburg University
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*************************************************************************************/
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*************************************************************************************/
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/* END LEGAL */
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/* END LEGAL */
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// GCC 10 messes up SVE instruction scheduling using -O3 only,
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// GCC 10 messes up SVE instruction scheduling using -O3, but
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// using -O3 -fno-schedule-insns -fno-schedule-insns2 does wonders
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// -O3 -fno-schedule-insns -fno-schedule-insns2 does wonders
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// performance is better than armclang 20.2
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// performance now is better than armclang 20.2
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#ifdef KERNEL_DAG
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#ifdef KERNEL_DAG
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#define DIR0_PROJ XP_PROJ
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#define DIR0_PROJ XP_PROJ
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@ -118,10 +118,6 @@ Author: Nils Meyer <nils.meyer@ur.de> Regensburg University
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/*
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/*
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NB: picking PREFETCH_GAUGE_L2(Dir+4); here results in performance penalty
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NB: picking PREFETCH_GAUGE_L2(Dir+4); here results in performance penalty
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though I expected that it would improve on performance
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though I expected that it would improve on performance
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if (s == 0) { \
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if ((Dir == 0) || (Dir == 4)) { PREFETCH_GAUGE_L2(Dir); } \
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} \
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*/
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*/
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#define ASM_LEG_XP(Dir,NxtDir,PERMUTE_DIR,PROJ,RECON) \
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#define ASM_LEG_XP(Dir,NxtDir,PERMUTE_DIR,PROJ,RECON) \
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@ -149,7 +145,7 @@ NB: picking PREFETCH_GAUGE_L2(Dir+4); here results in performance penalty
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if ( local || st.same_node[Dir] ) { \
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if ( local || st.same_node[Dir] ) { \
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MULT_2SPIN_1(Dir); \
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MULT_2SPIN_1(Dir); \
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MULT_2SPIN_2; \
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MULT_2SPIN_2; \
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RECON; \
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RECON; \
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} \
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} \
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base = st.GetInfo(ptype,local,perm,NxtDir,ent,plocal); ent++; \
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base = st.GetInfo(ptype,local,perm,NxtDir,ent,plocal); ent++; \
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PREFETCH_CHIMU(base); \
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PREFETCH_CHIMU(base); \
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@ -300,7 +296,7 @@ NB: picking PREFETCH_GAUGE_L2(Dir+4); here results in performance penalty
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// DC ZVA test
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// DC ZVA test
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// { uint64_t basestore = (uint64_t)&out[ss];
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// { uint64_t basestore = (uint64_t)&out[ss];
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// PREFETCH_RESULT_L2_STORE(basestore); }
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// PREFETCH_RESULT_L2_STORE(basestore); }
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ASM_LEG(Ym,Zm,PERMUTE_DIR2,DIR5_PROJ,DIR5_RECON);
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ASM_LEG(Ym,Zm,PERMUTE_DIR2,DIR5_PROJ,DIR5_RECON);
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@ -336,8 +332,8 @@ NB: picking PREFETCH_GAUGE_L2(Dir+4); here results in performance penalty
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// DC ZVA test
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// DC ZVA test
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//{ uint64_t basestore = (uint64_t)&out[ss];
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//{ uint64_t basestore = (uint64_t)&out[ss];
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// PREFETCH_RESULT_L2_STORE(basestore);
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// PREFETCH_RESULT_L2_STORE(basestore); }
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//}
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ASM_LEG(Tm,Xp,PERMUTE_DIR0,DIR7_PROJ,DIR7_RECON);
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ASM_LEG(Tm,Xp,PERMUTE_DIR0,DIR7_PROJ,DIR7_RECON);
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