From 53a9260a94da490f74bcd0fcb87b0771919c6372 Mon Sep 17 00:00:00 2001 From: Yong-Chull Jang Date: Sat, 27 Jan 2018 10:00:38 -0500 Subject: [PATCH] patch to compile with AVX512 for SkyLake Xeon processor using GCC7.2.0. Beside bug fixes in the source code, a option 'SKL' is added to configure.ac for SkyLake processor specific AVX512 instruction flags when using GCC. Code can be compiled with --enable-simd=SKL using GCC 7.2.0, but Test_simd fails. AVX512 support for complex double type with non-intel compilers makes this error. --- configure.ac | 3 +++ lib/qcd/action/fermion/CayleyFermion5Dvec.cc | 4 ++-- lib/qcd/action/fermion/DomainWallEOFAFermionvec.cc | 2 +- lib/qcd/action/fermion/MobiusEOFAFermionvec.cc | 2 +- lib/simd/Grid_avx512.h | 2 +- 5 files changed, 8 insertions(+), 5 deletions(-) diff --git a/configure.ac b/configure.ac index 496f7fd7..ab7d389a 100644 --- a/configure.ac +++ b/configure.ac @@ -249,6 +249,9 @@ case ${ax_cv_cxx_compiler_vendor} in AVX512) AC_DEFINE([AVX512],[1],[AVX512 intrinsics]) SIMD_FLAGS='-mavx512f -mavx512pf -mavx512er -mavx512cd';; + SKL) + AC_DEFINE([AVX512],[1],[AVX512 intrinsics for SkyLake Xeon]) + SIMD_FLAGS='-march=skylake-avx512';; KNC) AC_DEFINE([IMCI],[1],[IMCI intrinsics for Knights Corner]) SIMD_FLAGS='';; diff --git a/lib/qcd/action/fermion/CayleyFermion5Dvec.cc b/lib/qcd/action/fermion/CayleyFermion5Dvec.cc index 653e6ab3..a7aa6b37 100644 --- a/lib/qcd/action/fermion/CayleyFermion5Dvec.cc +++ b/lib/qcd/action/fermion/CayleyFermion5Dvec.cc @@ -469,7 +469,7 @@ void CayleyFermion5D::MooeeInternalAsm(const FermionField &psi, FermionFie } a0 = a0+incr; a1 = a1+incr; - a2 = a2+sizeof(Simd::scalar_type); + a2 = a2+sizeof(typename Simd::scalar_type); }} { int lexa = s1+LLs*site; @@ -701,7 +701,7 @@ void CayleyFermion5D::MooeeInternalZAsm(const FermionField &psi, FermionFi } a0 = a0+incr; a1 = a1+incr; - a2 = a2+sizeof(Simd::scalar_type); + a2 = a2+sizeof(typename Simd::scalar_type); }} { int lexa = s1+LLs*site; diff --git a/lib/qcd/action/fermion/DomainWallEOFAFermionvec.cc b/lib/qcd/action/fermion/DomainWallEOFAFermionvec.cc index 81ce448c..68fd4fec 100644 --- a/lib/qcd/action/fermion/DomainWallEOFAFermionvec.cc +++ b/lib/qcd/action/fermion/DomainWallEOFAFermionvec.cc @@ -475,7 +475,7 @@ namespace QCD { } a0 = a0 + incr; a1 = a1 + incr; - a2 = a2 + sizeof(Simd::scalar_type); + a2 = a2 + sizeof(typename Simd::scalar_type); } } diff --git a/lib/qcd/action/fermion/MobiusEOFAFermionvec.cc b/lib/qcd/action/fermion/MobiusEOFAFermionvec.cc index c4eaf0f3..b7980660 100644 --- a/lib/qcd/action/fermion/MobiusEOFAFermionvec.cc +++ b/lib/qcd/action/fermion/MobiusEOFAFermionvec.cc @@ -853,7 +853,7 @@ namespace QCD { a0 = a0 + incr; a1 = a1 + incr; - a2 = a2 + sizeof(Simd::scalar_type); + a2 = a2 + sizeof(typename Simd::scalar_type); } } diff --git a/lib/simd/Grid_avx512.h b/lib/simd/Grid_avx512.h index 85d27421..4185b7d5 100644 --- a/lib/simd/Grid_avx512.h +++ b/lib/simd/Grid_avx512.h @@ -556,7 +556,7 @@ namespace Optimization { v3 = _mm256_add_epi32(v1, v2); v1 = _mm256_hadd_epi32(v3, v3); v2 = _mm256_hadd_epi32(v1, v1); - u1 = _mm256_castsi256_si128(v2) // upper half + u1 = _mm256_castsi256_si128(v2); // upper half u2 = _mm256_extracti128_si256(v2, 1); // lower half ret = _mm_add_epi32(u1, u2); return _mm_cvtsi128_si32(ret);