From 6ab744c720286e11af8d8e2cd8ea8c92b9017b06 Mon Sep 17 00:00:00 2001 From: paboyle Date: Fri, 12 Jan 2018 18:11:04 +0000 Subject: [PATCH] NAMESPACE and formatting --- lib/simd/Grid_generic_types.h | 85 ++++++++++++++++++----------------- 1 file changed, 43 insertions(+), 42 deletions(-) diff --git a/lib/simd/Grid_generic_types.h b/lib/simd/Grid_generic_types.h index 642f6ffe..282a76c3 100644 --- a/lib/simd/Grid_generic_types.h +++ b/lib/simd/Grid_generic_types.h @@ -1,4 +1,4 @@ - /************************************************************************************* +/************************************************************************************* Grid physics library, www.github.com/paboyle/Grid @@ -24,8 +24,8 @@ Author: Antonin Portelli 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. See the full license in the file "LICENSE" in the top level distribution directory - *************************************************************************************/ - /* END LEGAL */ +*************************************************************************************/ +/* END LEGAL */ static_assert(GEN_SIMD_WIDTH % 16u == 0, "SIMD vector size is not an integer multiple of 16 bytes"); @@ -34,52 +34,53 @@ static_assert(GEN_SIMD_WIDTH % 16u == 0, "SIMD vector size is not an integer mul // playing with compiler pragmas #ifdef VECTOR_LOOPS #ifdef __clang__ -#define VECTOR_FOR(i, w, inc)\ -_Pragma("clang loop unroll(full) vectorize(enable) interleave(enable) vectorize_width(w)")\ -for (unsigned int i = 0; i < w; i += inc) +#define VECTOR_FOR(i, w, inc) \ + _Pragma("clang loop unroll(full) vectorize(enable) interleave(enable) vectorize_width(w)") \ + for (unsigned int i = 0; i < w; i += inc) #elif defined __INTEL_COMPILER -#define VECTOR_FOR(i, w, inc)\ -_Pragma("simd vectorlength(w*8)")\ -for (unsigned int i = 0; i < w; i += inc) +#define VECTOR_FOR(i, w, inc) \ + _Pragma("simd vectorlength(w*8)") \ + for (unsigned int i = 0; i < w; i += inc) #else -#define VECTOR_FOR(i, w, inc)\ -for (unsigned int i = 0; i < w; i += inc) +#define VECTOR_FOR(i, w, inc) \ + for (unsigned int i = 0; i < w; i += inc) #endif #else -#define VECTOR_FOR(i, w, inc)\ -for (unsigned int i = 0; i < w; i += inc) +#define VECTOR_FOR(i, w, inc) \ + for (unsigned int i = 0; i < w; i += inc) #endif -namespace Grid { -namespace Optimization { +NAMESPACE_BEGIN(Grid); +NAMESPACE_BEGIN(Optimization); - // type traits giving the number of elements for each vector type - template struct W; - template <> struct W { - constexpr static unsigned int c = GEN_SIMD_WIDTH/16u; - constexpr static unsigned int r = GEN_SIMD_WIDTH/8u; - }; - template <> struct W { - constexpr static unsigned int c = GEN_SIMD_WIDTH/8u; - constexpr static unsigned int r = GEN_SIMD_WIDTH/4u; - }; - template <> struct W { - constexpr static unsigned int r = GEN_SIMD_WIDTH/4u; - }; - template <> struct W { - constexpr static unsigned int c = GEN_SIMD_WIDTH/4u; - constexpr static unsigned int r = GEN_SIMD_WIDTH/2u; - }; +// type traits giving the number of elements for each vector type +template struct W; +template <> struct W { + constexpr static unsigned int c = GEN_SIMD_WIDTH/16u; + constexpr static unsigned int r = GEN_SIMD_WIDTH/8u; +}; +template <> struct W { + constexpr static unsigned int c = GEN_SIMD_WIDTH/8u; + constexpr static unsigned int r = GEN_SIMD_WIDTH/4u; +}; +template <> struct W { + constexpr static unsigned int r = GEN_SIMD_WIDTH/4u; +}; +template <> struct W { + constexpr static unsigned int c = GEN_SIMD_WIDTH/4u; + constexpr static unsigned int r = GEN_SIMD_WIDTH/2u; +}; - // SIMD vector types - template - struct vec { - alignas(GEN_SIMD_WIDTH) T v[W::r]; - }; +// SIMD vector types +template +struct vec { + alignas(GEN_SIMD_WIDTH) T v[W::r]; +}; - typedef vec vecf; - typedef vec vecd; - typedef vec vech; // half precision comms - typedef vec veci; +typedef vec vecf; +typedef vec vecd; +typedef vec vech; // half precision comms +typedef vec veci; -}} +NAMESPACE_END(Optimization); +NAMESPACE_END(Grid);