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Enable reordering of the loops in the assembler for cache friendly.
This gets in the way of L2 prefetching however. Do next next link in stencil prefetching.
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@ -111,7 +111,7 @@ namespace Grid {
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const FermionField &B,
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int dag);
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void DhopInternal(StencilImpl & st,DoubledGaugeField & U,
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void DhopInternal(StencilImpl & st,LebesgueOrder & lo,DoubledGaugeField & U,
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const FermionField &in, FermionField &out,int dag) ;
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// Constructor
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@ -146,6 +146,10 @@ namespace Grid {
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DoubledGaugeField Umu;
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DoubledGaugeField UmuEven;
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DoubledGaugeField UmuOdd;
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LebesgueOrder Lebesgue;
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LebesgueOrder LebesgueEvenOdd;
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};
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