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New GPU vector targets
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@ -38,6 +38,80 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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#ifndef GRID_VECTOR_TYPES
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#define GRID_VECTOR_TYPES
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// PAB - Lifted and adapted from Eigen, which is GPL V2
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struct Grid_half {
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accelerator Grid_half(){}
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accelerator Grid_half(uint16_t raw) : x(raw) {}
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uint16_t x;
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};
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union FP32 {
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unsigned int u;
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float f;
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};
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accelerator_inline float sfw_half_to_float(Grid_half h) {
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const FP32 magic = { 113 << 23 };
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const unsigned int shifted_exp = 0x7c00 << 13; // exponent mask after shift
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FP32 o;
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o.u = (h.x & 0x7fff) << 13; // exponent/mantissa bits
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unsigned int exp = shifted_exp & o.u; // just the exponent
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o.u += (127 - 15) << 23; // exponent adjust
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// handle exponent special cases
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if (exp == shifted_exp) { // Inf/NaN?
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o.u += (128 - 16) << 23; // extra exp adjust
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} else if (exp == 0) { // Zero/Denormal?
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o.u += 1 << 23; // extra exp adjust
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o.f -= magic.f; // renormalize
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}
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o.u |= (h.x & 0x8000) << 16; // sign bit
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return o.f;
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}
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accelerator_inline Grid_half sfw_float_to_half(float ff) {
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FP32 f; f.f = ff;
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const FP32 f32infty = { 255 << 23 };
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const FP32 f16max = { (127 + 16) << 23 };
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const FP32 denorm_magic = { ((127 - 15) + (23 - 10) + 1) << 23 };
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unsigned int sign_mask = 0x80000000u;
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Grid_half o;
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o.x = static_cast<unsigned short>(0x0u);
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unsigned int sign = f.u & sign_mask;
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f.u ^= sign;
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// NOTE all the integer compares in this function can be safely
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// compiled into signed compares since all operands are below
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// 0x80000000. Important if you want fast straight SSE2 code
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// (since there's no unsigned PCMPGTD).
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if (f.u >= f16max.u) { // result is Inf or NaN (all exponent bits set)
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o.x = (f.u > f32infty.u) ? 0x7e00 : 0x7c00; // NaN->qNaN and Inf->Inf
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} else { // (De)normalized number or zero
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if (f.u < (113 << 23)) { // resulting FP16 is subnormal or zero
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// use a magic value to align our 10 mantissa bits at the bottom of
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// the float. as long as FP addition is round-to-nearest-even this
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// just works.
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f.f += denorm_magic.f;
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// and one integer subtract of the bias later, we have our final float!
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o.x = static_cast<unsigned short>(f.u - denorm_magic.u);
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} else {
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unsigned int mant_odd = (f.u >> 13) & 1; // resulting mantissa is odd
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// update exponent, rounding bias part 1
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f.u += ((unsigned int)(15 - 127) << 23) + 0xfff;
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// rounding bias part 2
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f.u += mant_odd;
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// take the bits!
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o.x = static_cast<unsigned short>(f.u >> 13);
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}
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}
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o.x |= static_cast<unsigned short>(sign >> 16);
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return o;
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}
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#ifdef GPU_VEC
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#include "Grid_gpu_vec.h"
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#endif
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#ifdef GPU
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#include "Grid_gpu.h"
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#endif
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#ifdef GEN
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#include "Grid_generic.h"
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#endif
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@ -62,6 +136,7 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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NAMESPACE_BEGIN(Grid);
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//////////////////////////////////////
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// To take the floating point type of real/complex type
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//////////////////////////////////////
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@ -250,7 +325,7 @@ public:
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// Vstore
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///////////////////////
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friend accelerator_inline void vstore(const Grid_simd &ret, Scalar_type *a) {
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binary<void>(ret.v, (Real *)a, VstoreSIMD());
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binary<void>(ret.v, (Real *) a, VstoreSIMD());
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}
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///////////////////////
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@ -426,6 +501,25 @@ public:
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}
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}; // end of Grid_simd class definition
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///////////////////////////////
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// Define available types
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///////////////////////////////
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typedef Grid_simd<float , SIMD_Ftype> vRealF;
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typedef Grid_simd<double , SIMD_Dtype> vRealD;
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typedef Grid_simd<Integer, SIMD_Itype> vInteger;
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typedef Grid_simd<uint16_t,SIMD_Htype> vRealH;
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#ifdef GPU_VEC
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typedef Grid_simd<complex<uint16_t>, SIMD_CHtype> vComplexH;
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typedef Grid_simd<complex<float> , SIMD_CFtype> vComplexF;
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typedef Grid_simd<complex<double> , SIMD_CDtype> vComplexD;
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#else
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typedef Grid_simd<complex<uint16_t>, SIMD_Htype> vComplexH;
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typedef Grid_simd<complex<float> , SIMD_Ftype> vComplexF;
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typedef Grid_simd<complex<double> , SIMD_Dtype> vComplexD;
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#endif
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accelerator_inline void permute(ComplexD &y,ComplexD b, int perm) { y=b; }
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accelerator_inline void permute(ComplexF &y,ComplexF b, int perm) { y=b; }
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accelerator_inline void permute(RealD &y,RealD b, int perm) { y=b; }
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@ -763,18 +857,6 @@ accelerator_inline Grid_simd< complex<R>, V> toComplex(const Grid_simd<R, V> &in
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return ret;
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}
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///////////////////////////////
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// Define available types
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///////////////////////////////
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typedef Grid_simd<float, SIMD_Ftype> vRealF;
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typedef Grid_simd<double, SIMD_Dtype> vRealD;
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typedef Grid_simd< complex<float>, SIMD_Ftype> vComplexF;
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typedef Grid_simd< complex<double>, SIMD_Dtype> vComplexD;
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typedef Grid_simd<Integer, SIMD_Itype> vInteger;
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// Half precision; no arithmetic support
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typedef Grid_simd<uint16_t, SIMD_Htype> vRealH;
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typedef Grid_simd< complex<uint16_t>, SIMD_Htype> vComplexH;
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accelerator_inline void precisionChange(vRealF *out,vRealD *in,int nvec)
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{
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