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correct tbl2 for sp
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2402b4940e
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@ -82,7 +82,7 @@ NAMESPACE_BEGIN(Optimization);
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};
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};
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#else // not defines ARMCLANGCOMPAT
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#else // no ARMCLANGCOMPAT
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#define vec_imm vec
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// SIMD vector types
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template <typename T>
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@ -181,7 +181,7 @@ struct acle<float>{
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}
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static inline vec<uint32_t> tbl2(){
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//const vec<uint32_t> t = {2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13};
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const vec_imm<uint32_t> t = {4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 8, 9, 10, 11};
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const vec_imm<uint32_t> t = {2, 3, 0, 1, 6, 7, 4, 5, 10, 11, 8, 9, 14, 15, 12, 13};
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return t;
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}
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static inline vec<uint32_t> tbl_exch1a(){ // Exchange1
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@ -889,6 +889,7 @@ inline Integer Reduce<Integer, veci>::operator()(veci in){
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}
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#undef svred
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#undef vec_imm
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NAMESPACE_END(Optimization)
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@ -122,7 +122,7 @@ accelerator_inline Grid_half sfw_float_to_half(float ff) {
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#if defined(A64FX) // VLA
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#pragma message("building for A64FX / SVE ACLE VLA")
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#if defined(ARMCLANGCOMPAT)
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#pragma message("applying armclang patch")
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#pragma message("applying data types patch")
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#endif
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#include "Grid_a64fx-2.h"
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#endif
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@ -327,8 +327,9 @@ public:
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// FIXME -- alias this to an accelerator_inline MAC struct.
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// FIXME VLA build error
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#if defined(A64FX) || defined(A64FXFIXEDSIZE)
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// safety exclude fxmac from VLA (causing wrong results?)
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//#if defined(A64FX) || defined(A64FXFIXEDSIZE)
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#if defined(A64FXFIXEDSIZE)
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friend accelerator_inline void mac(Grid_simd *__restrict__ y,
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const Grid_simd *__restrict__ a,
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const Grid_simd *__restrict__ x) {
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