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Included Gpermute in the new Grid_simd.h file style.
Now tested for SSE4. OK
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@ -95,6 +95,20 @@ namespace Grid {
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template<> inline void zeroit(RealF &arg){ arg=0; };
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template<> inline void zeroit(RealD &arg){ arg=0; };
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//////////////////////////////////////////////////////////
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// Permute
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// Permute 0 every ABCDEFGH -> BA DC FE HG
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// Permute 1 every ABCDEFGH -> CD AB GH EF
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// Permute 2 every ABCDEFGH -> EFGH ABCD
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// Permute 3 possible on longer iVector lengths (512bit = 8 double = 16 single)
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// Permute 4 possible on half precision @512bit vectors.
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//
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// Defined inside SIMD specialization files
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//////////////////////////////////////////////////////////
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template<class VectorSIMD>
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inline void Gpermute(VectorSIMD &y,const VectorSIMD &b,int perm);
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};
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#include <simd/Grid_vector_types.h>
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@ -4,7 +4,7 @@
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Using intrinsics
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*/
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// Time-stamp: <2015-05-22 18:58:27 neo>
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// Time-stamp: <2015-05-27 12:07:15 neo>
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//----------------------------------------------------------------------
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#include <immintrin.h>
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@ -383,6 +383,30 @@ namespace Grid {
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typedef __m256d SIMD_Dtype; // Double precision type
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typedef __m256i SIMD_Itype; // Integer type
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// prefecthing
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inline void v_prefetch0(int size, const char *ptr){
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for(int i=0;i<size;i+=64){ // Define L1 linesize above
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_mm_prefetch(ptr+i+4096,_MM_HINT_T1);
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_mm_prefetch(ptr+i+512,_MM_HINT_T0);
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}
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}
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template < typename VectorSIMD >
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inline void Gpermute(VectorSIMD &y,const VectorSIMD &b, int perm ) {
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union {
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__m256 f;
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decltype(VectorSIMD::v) v;
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} conv;
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conv.v = b.v;
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switch(perm){
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case 3: break; //empty for AVX1/2
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case 2: conv.f = _mm256_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(2,3,0,1)); break;
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case 1: conv.f = _mm256_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(1,0,3,2)); break;
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case 0: conv.f = _mm256_permute2f128_ps(conv.f,conv.f,0x01); break;
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default: assert(0); break;
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}
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y.v=conv.v;
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};
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// Function name aliases
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typedef Optimization::Vsplat VsplatSIMD;
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@ -4,7 +4,7 @@
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Using intrinsics
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*/
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// Time-stamp: <2015-05-22 17:12:44 neo>
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// Time-stamp: <2015-05-27 12:08:50 neo>
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//----------------------------------------------------------------------
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#include <immintrin.h>
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@ -302,6 +302,31 @@ namespace Grid {
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typedef __m512d SIMD_Dtype; // Double precision type
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typedef __m512i SIMD_Itype; // Integer type
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// prefecth
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inline void v_prefetch0(int size, const char *ptr){
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for(int i=0;i<size;i+=64){ // Define L1 linesize above
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_mm_prefetch(ptr+i+4096,_MM_HINT_T1);
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_mm_prefetch(ptr+i+512,_MM_HINT_T0);
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}
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}
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// Gpermute utilities consider coalescing into 1 Gpermute
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template < typename VectorSIMD >
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inline void Gpermute(VectorSIMD &y,const VectorSIMD &b, int perm ) {
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union {
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__m512 f;
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decltype(VectorSIMD::v) v;
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} conv;
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conv.v = b.v;
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switch(perm){
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case 3: conv.f = _mm512_swizzle_ps(conv.f,_MM_SWIZ_REG_CDAB); break;
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case 2: conv.f = _mm512_swizzle_ps(conv.f,_MM_SWIZ_REG_BADC); break;
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case 1 : conv.f = _mm512_permute4f128_ps(conv.f,(_MM_PERM_ENUM)_MM_SHUFFLE(2,3,0,1)); break;
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case 0 : conv.f = _mm512_permute4f128_ps(conv.f,(_MM_PERM_ENUM)_MM_SHUFFLE(1,0,3,2)); break;
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default: assert(0); break;
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}
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y=conv.v;
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};
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// Function name aliases
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typedef Optimization::Vsplat VsplatSIMD;
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@ -4,7 +4,7 @@
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Using intrinsics
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*/
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// Time-stamp: <2015-05-22 17:29:26 neo>
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// Time-stamp: <2015-05-27 11:30:21 neo>
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//----------------------------------------------------------------------
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// lot of undefined functions
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@ -251,6 +251,7 @@ namespace Grid {
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typedef vector4double SIMD_Dtype; // Double precision type
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typedef int SIMD_Itype; // Integer type
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inline void v_prefetch0(int size, const char *ptr){};
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// Function name aliases
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typedef Optimization::Vsplat VsplatSIMD;
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@ -4,7 +4,7 @@
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Using intrinsics
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*/
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// Time-stamp: <2015-05-21 18:06:30 neo>
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// Time-stamp: <2015-05-27 12:02:07 neo>
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//----------------------------------------------------------------------
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#include <pmmintrin.h>
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@ -278,6 +278,10 @@ namespace Optimization {
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}
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}
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//////////////////////////////////////////////////////////////////////////////////////
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@ -289,6 +293,28 @@ namespace Grid {
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typedef __m128i SIMD_Itype; // Integer type
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inline void v_prefetch0(int size, const char *ptr){}; // prefetch utilities
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// Gpermute function
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template < typename VectorSIMD >
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inline void Gpermute(VectorSIMD &y,const VectorSIMD &b, int perm ) {
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union {
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__m128 f;
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decltype(VectorSIMD::v) v;
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} conv;
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conv.v = b.v;
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switch(perm){
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case 3: break; //empty for SSE4
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case 2: break; //empty for SSE4
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case 1: conv.f = _mm_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(2,3,0,1)); break;
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case 0: conv.f = _mm_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(1,0,3,2)); break;
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default: assert(0); break;
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}
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y.v=conv.v;
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};
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// Function name aliases
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typedef Optimization::Vsplat VsplatSIMD;
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typedef Optimization::Vstore VstoreSIMD;
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@ -297,6 +323,8 @@ namespace Grid {
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template <typename S, typename T> using ReduceSIMD = Optimization::Reduce<S,T>;
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// Arithmetic operations
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typedef Optimization::Sum SumSIMD;
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typedef Optimization::Sub SubSIMD;
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@ -2,7 +2,7 @@
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/*! @file Grid_vector_types.h
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@brief Defines templated class Grid_simd to deal with inner vector types
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*/
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// Time-stamp: <2015-05-26 14:08:13 neo>
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// Time-stamp: <2015-05-27 12:04:06 neo>
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//---------------------------------------------------------------------------
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#ifndef GRID_VECTOR_TYPES
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#define GRID_VECTOR_TYPES
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@ -58,55 +58,6 @@ namespace Grid {
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///////////////////////////////////////////////
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// Move to the simd files
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//////////////////////////////////////////////////////////
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// Permute
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// Permute 0 every ABCDEFGH -> BA DC FE HG
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// Permute 1 every ABCDEFGH -> CD AB GH EF
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// Permute 2 every ABCDEFGH -> EFGH ABCD
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// Permute 3 possible on longer iVector lengths (512bit = 8 double = 16 single)
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// Permute 4 possible on half precision @512bit vectors.
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//////////////////////////////////////////////////////////
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template<class vsimd>
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inline void Gpermute(vsimd &y,const vsimd &b,int perm){
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union {
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SIMD_Ftype f;
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decltype(vsimd::v) v;
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} conv;
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conv.v = b.v;
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switch (perm){
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#if defined(AVX1)||defined(AVX2)
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// 8x32 bits=>3 permutes
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case 2: conv.f = _mm256_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(2,3,0,1)); break;
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case 1: conv.f = _mm256_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(1,0,3,2)); break;
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case 0: conv.f = _mm256_permute2f128_ps(conv.f,conv.f,0x01); break;
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#endif
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#ifdef SSE4
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case 1: conv.f = _mm_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(2,3,0,1)); break;
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case 0: conv.f = _mm_shuffle_ps(conv.f,conv.f,_MM_SHUFFLE(1,0,3,2));break;
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#endif
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#ifdef AVX512
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// 16 floats=> permutes
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// Permute 0 every abcd efgh ijkl mnop -> badc fehg jilk nmpo
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// Permute 1 every abcd efgh ijkl mnop -> cdab ghef jkij opmn
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// Permute 2 every abcd efgh ijkl mnop -> efgh abcd mnop ijkl
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// Permute 3 every abcd efgh ijkl mnop -> ijkl mnop abcd efgh
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case 3: conv.f = _mm512_swizzle_ps(conv.f,_MM_SWIZ_REG_CDAB); break;
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case 2: conv.f = _mm512_swizzle_ps(conv.f,_MM_SWIZ_REG_BADC); break;
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case 1: conv.f = _mm512_permute4f128_ps(conv.f,(_MM_PERM_ENUM)_MM_SHUFFLE(2,3,0,1)); break;
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case 0: conv.f = _mm512_permute4f128_ps(conv.f,(_MM_PERM_ENUM)_MM_SHUFFLE(1,0,3,2)); break;
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#endif
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#ifdef QPX
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#error not implemented
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#endif
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default: assert(0); break;
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}
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y.v=conv.v;
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};
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///////////////////////////////////////
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/*
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