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Defer SMP node links until after interior. Allows for DMA overlapping
compute
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bb049847d5
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@ -72,20 +72,15 @@ accelerator_inline void get_stencil(StencilEntry * mem, StencilEntry &chip)
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if (SE->_is_local) { \
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if (SE->_is_local) { \
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int perm= SE->_permute; \
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int perm= SE->_permute; \
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auto tmp = coalescedReadPermute(in[SE->_offset],ptype,perm,lane); \
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auto tmp = coalescedReadPermute(in[SE->_offset],ptype,perm,lane); \
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spProj(chi,tmp); \
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spProj(chi,tmp); \
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} else if ( st.same_node[Dir] ) { \
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Impl::multLink(Uchi, U[sU], chi, Dir, SE, st); \
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chi = coalescedRead(buf[SE->_offset],lane); \
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Recon(result, Uchi); \
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} \
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} \
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acceleratorSynchronise(); \
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if (SE->_is_local || st.same_node[Dir] ) { \
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Impl::multLink(Uchi, U[sU], chi, Dir, SE, st); \
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Recon(result, Uchi); \
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} \
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acceleratorSynchronise();
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acceleratorSynchronise();
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#define GENERIC_STENCIL_LEG_EXT(Dir,spProj,Recon) \
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#define GENERIC_STENCIL_LEG_EXT(Dir,spProj,Recon) \
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SE = st.GetEntry(ptype, Dir, sF); \
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SE = st.GetEntry(ptype, Dir, sF); \
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if ((!SE->_is_local) && (!st.same_node[Dir]) ) { \
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if (!SE->_is_local ) { \
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auto chi = coalescedRead(buf[SE->_offset],lane); \
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auto chi = coalescedRead(buf[SE->_offset],lane); \
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Impl::multLink(Uchi, U[sU], chi, Dir, SE, st); \
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Impl::multLink(Uchi, U[sU], chi, Dir, SE, st); \
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Recon(result, Uchi); \
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Recon(result, Uchi); \
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