mirror of
https://github.com/paboyle/Grid.git
synced 2025-04-10 22:20:45 +01:00
Formatting emacs compliant
This commit is contained in:
paboyle
parent
b815f5f764
commit
bd15c38ae8
@ -1,4 +1,4 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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#ifndef GRID_ASM_AV512_H
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#define GRID_ASM_AV512_H
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@ -44,21 +44,21 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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#define ZENDf(Criir,Ciirr, tmp) ZEND1f(Criir,Ciirr, tmp) ZEND2f(Criir,Ciirr, tmp)
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#define ZENDd(Criir,Ciirr, tmp) ZEND1d(Criir,Ciirr, tmp) ZEND2d(Criir,Ciirr, tmp)
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#define ZMULMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMULMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMULMEMf(O,P,B,Biirr) \
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VMULMEMf(O,P,C,Ciirr) \
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VMULf(tmp,B,Briir) \
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VMULf(tmp,C,Criir)
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#define ZMULMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMULMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMd(O,P,tmp) \
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VMULMEMd(O,P,B,Biirr) \
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VMULMEMd(O,P,C,Ciirr) \
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VMULd(tmp,B,Briir) \
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VMULd(tmp,C,Criir)
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#define ZMADDMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMADDMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMADDMEMf(O,P,B,Biirr) \
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VMADDMEMf(O,P,C,Ciirr) \
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@ -73,16 +73,16 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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VMADDd(tmp,C,Criir)
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// Merges accumulation for complex dot chain; less efficient under avx512
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#define ZEND1f(Criir,Ciirr, tmp) "vshufps $0xb1," #Criir "," #Criir "," #tmp ";\n"\
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#define ZEND1f(Criir,Ciirr, tmp) "vshufps $0xb1," #Criir "," #Criir "," #tmp ";\n" \
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"vaddps " #tmp "," #Criir "," #Criir"{%k6}" ";\n"
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#define ZEND2f(Criir,Ciirr, tmp) "vshufps $0xb1," #Ciirr "," #Ciirr "," #tmp ";\n"\
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#define ZEND2f(Criir,Ciirr, tmp) "vshufps $0xb1," #Ciirr "," #Ciirr "," #tmp ";\n" \
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"vsubps " #tmp "," #Ciirr "," #Criir"{%k7}" ";\n"
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#define ZEND1d(Criir,Ciirr, tmp) "vshufpd $0x55," #Criir "," #Criir "," #tmp ";\n"\
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"vaddps " #tmp "," #Criir "," #Criir"{%k6}" ";\n"
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"vaddps " #tmp "," #Criir "," #Criir"{%k6}" ";\n"
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#define ZEND2d(Criir,Ciirr, tmp) "vshufpd $0x55," #Ciirr "," #Ciirr "," #tmp ";\n"\
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#define ZEND2d(Criir,Ciirr, tmp) "vshufpd $0x55," #Ciirr "," #Ciirr "," #tmp ";\n" \
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"vsubpd " #tmp "," #Ciirr "," #Criir"{%k7};\n" // ri+ir ; ri+ir,rr-ii
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#define VMOVRDUPd(OFF,A,DEST) "vpshufd $0x44," #OFF "*64(" #A ")," #DEST ";\n" // 32 bit level: 1,0,3,2
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@ -123,7 +123,7 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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#define VMADDSUBIDUPd(O,P,B,accum) "vfmaddsub231pd (" #O"*16+8)("#P "){1to8},"#B "," #accum ";\n"
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#define VMULRDUPd(O,P,B,accum) "vmulpd (" #O"*16+0)("#P "){1to8},"#B "," #accum ";\n"
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#define VMULIDUPd(O,P,B,accum) "vmulpd (" #O"*16+8)("#P "){1to8},"#B "," #accum ";\n"
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/*
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/*
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* TimesI is used only in the XP recon
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* Could zero the regs and use RECON_ACCUM
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*/
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@ -1,4 +1,4 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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#ifndef GRID_ASM_INTEL_COMMON_512_H
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#define GRID_ASM_INTEL_COMMON_512_H
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@ -37,9 +37,9 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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// Opcodes common
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////////////////////////////////////////////////////////////////////////////////////////////////////
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#define MASK_REGS \
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__asm__ ("mov $0xAAAA, %%eax \n"\
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"kmovw %%eax, %%k6 \n"\
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"mov $0x5555, %%eax \n"\
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__asm__ ("mov $0xAAAA, %%eax \n" \
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"kmovw %%eax, %%k6 \n" \
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"mov $0x5555, %%eax \n" \
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"kmovw %%eax, %%k7 \n" : : : "%eax");
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//#define label(B) __asm__ ( __func__ _LINE__ #B ":\n" );
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@ -1,4 +1,4 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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// No guard can be multiply included as undef clearage
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#undef VZERO
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#undef VMOV
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@ -1,4 +1,4 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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#ifndef GRID_ASM_AV512_H
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#define GRID_ASM_AV512_H
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@ -44,21 +44,21 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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#define ZENDf(Criir,Ciirr, tmp) ZEND1f(Criir,Ciirr, tmp) ZEND2f(Criir,Ciirr, tmp)
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#define ZENDd(Criir,Ciirr, tmp) ZEND1d(Criir,Ciirr, tmp) ZEND2d(Criir,Ciirr, tmp)
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#define ZMULMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMULMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMULMEMf(O,P,B,Biirr) \
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VMULMEMf(O,P,C,Ciirr) \
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VMULf(tmp,B,Briir) \
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VMULf(tmp,C,Criir)
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#define ZMULMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMULMEM2SPd(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMd(O,P,tmp) \
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VMULMEMd(O,P,B,Biirr) \
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VMULMEMd(O,P,C,Ciirr) \
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VMULd(tmp,B,Briir) \
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VMULd(tmp,C,Criir)
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VMULMEMd(O,P,C,Ciirr) \
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VMULd(tmp,B,Briir) \
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VMULd(tmp,C,Criir)
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#define ZMADDMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr)\
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#define ZMADDMEM2SPf(O,P,tmp,B,C,Briir,Biirr,Criir,Ciirr) \
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VSHUFMEMf(O,P,tmp) \
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VMADDMEMf(O,P,B,Biirr) \
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VMADDMEMf(O,P,C,Ciirr) \
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@ -106,7 +106,7 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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#define VACCTIMESMINUSI1f(A,ACC,tmp) "vsubps " #A "{cdab}," #ACC "," #ACC"{%k7}" ";\n"
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#define VACCTIMESMINUSI2f(A,ACC,tmp) "vaddps " #A "{cdab}," #ACC "," #ACC"{%k6}" ";\n"
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// Acc = Acc - i A
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// Acc = Acc - i A
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#define VACCTIMESMINUSI0d(A,ACC,tmp)
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#define VACCTIMESMINUSI1d(A,ACC,tmp) "vsubpd " #A "{cdab}," #ACC "," #ACC"{%k7}" ";\n"
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#define VACCTIMESMINUSI2d(A,ACC,tmp) "vaddpd " #A "{cdab}," #ACC "," #ACC"{%k6}" ";\n"
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@ -1,4 +1,4 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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// No guard can be multiply included as undef clearge of macros
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#undef VZERO
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#undef VMOV
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@ -23,8 +23,8 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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See the full license in the file "LICENSE" in the top level distribution directory
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*************************************************************************************/
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/* END LEGAL */
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*************************************************************************************/
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/* END LEGAL */
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#ifndef GRID_ASM_INTEL_512_QCD_H
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#define GRID_ASM_INTEL_512_QCD_H
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@ -143,7 +143,7 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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VLOAD(10,%r8,Chimu_31) \
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VLOAD(11,%r8,Chimu_32)
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#define SHUF_CHIMU23i\
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#define SHUF_CHIMU23i \
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VSHUFMEM(6,%r8,Chimu_20) \
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VSHUFMEM(7,%r8,Chimu_21) \
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VSHUFMEM(8,%r8,Chimu_22) \
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@ -250,21 +250,21 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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// hspin(0)=fspin(0)-timesI(fspin(3))
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// hspin(1)=fspin(1)-timesI(fspin(2))
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#define XM_PROJMEM(PTR) \
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LOAD64(%r8,PTR)\
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LOAD64(%r8,PTR) \
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__asm__ ( \
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LOAD_CHIi \
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SHUF_CHIMU23i \
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VACCTIMESMINUSI1(Chi_00,Chi_00,Chimu_30)\
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VACCTIMESMINUSI1(Chi_01,Chi_01,Chimu_31)\
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VACCTIMESMINUSI1(Chi_02,Chi_02,Chimu_32)\
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VACCTIMESMINUSI1(Chi_10,Chi_10,Chimu_20)\
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VACCTIMESMINUSI1(Chi_11,Chi_11,Chimu_21)\
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VACCTIMESMINUSI1(Chi_12,Chi_12,Chimu_22)\
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VACCTIMESMINUSI2(Chi_00,Chi_00,Chimu_30)\
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VACCTIMESMINUSI2(Chi_01,Chi_01,Chimu_31)\
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VACCTIMESMINUSI2(Chi_02,Chi_02,Chimu_32)\
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VACCTIMESMINUSI2(Chi_10,Chi_10,Chimu_20)\
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VACCTIMESMINUSI2(Chi_11,Chi_11,Chimu_21)\
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VACCTIMESMINUSI1(Chi_00,Chi_00,Chimu_30) \
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VACCTIMESMINUSI1(Chi_01,Chi_01,Chimu_31) \
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VACCTIMESMINUSI1(Chi_02,Chi_02,Chimu_32) \
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VACCTIMESMINUSI1(Chi_10,Chi_10,Chimu_20) \
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VACCTIMESMINUSI1(Chi_11,Chi_11,Chimu_21) \
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VACCTIMESMINUSI1(Chi_12,Chi_12,Chimu_22) \
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VACCTIMESMINUSI2(Chi_00,Chi_00,Chimu_30) \
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VACCTIMESMINUSI2(Chi_01,Chi_01,Chimu_31) \
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VACCTIMESMINUSI2(Chi_02,Chi_02,Chimu_32) \
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VACCTIMESMINUSI2(Chi_10,Chi_10,Chimu_20) \
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VACCTIMESMINUSI2(Chi_11,Chi_11,Chimu_21) \
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VACCTIMESMINUSI2(Chi_12,Chi_12,Chimu_22) );
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#define YM_PROJMEM(ptr) \
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@ -283,17 +283,17 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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__asm__ ( \
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LOAD_CHIi \
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SHUF_CHIMU23i \
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VACCTIMESMINUSI1(Chi_00,Chi_00,Chimu_20)\
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VACCTIMESMINUSI1(Chi_01,Chi_01,Chimu_21)\
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VACCTIMESMINUSI1(Chi_02,Chi_02,Chimu_22)\
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VACCTIMESI1(Chi_10,Chi_10,Chimu_30)\
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VACCTIMESI1(Chi_11,Chi_11,Chimu_31)\
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VACCTIMESI1(Chi_12,Chi_12,Chimu_32)\
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VACCTIMESMINUSI2(Chi_00,Chi_00,Chimu_20)\
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VACCTIMESMINUSI2(Chi_01,Chi_01,Chimu_21)\
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VACCTIMESMINUSI2(Chi_02,Chi_02,Chimu_22)\
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VACCTIMESI2(Chi_10,Chi_10,Chimu_30)\
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VACCTIMESI2(Chi_11,Chi_11,Chimu_31)\
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VACCTIMESMINUSI1(Chi_00,Chi_00,Chimu_20) \
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VACCTIMESMINUSI1(Chi_01,Chi_01,Chimu_21) \
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VACCTIMESMINUSI1(Chi_02,Chi_02,Chimu_22) \
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VACCTIMESI1(Chi_10,Chi_10,Chimu_30) \
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VACCTIMESI1(Chi_11,Chi_11,Chimu_31) \
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VACCTIMESI1(Chi_12,Chi_12,Chimu_32) \
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VACCTIMESMINUSI2(Chi_00,Chi_00,Chimu_20) \
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VACCTIMESMINUSI2(Chi_01,Chi_01,Chimu_21) \
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VACCTIMESMINUSI2(Chi_02,Chi_02,Chimu_22) \
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VACCTIMESI2(Chi_10,Chi_10,Chimu_30) \
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VACCTIMESI2(Chi_11,Chi_11,Chimu_31) \
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VACCTIMESI2(Chi_12,Chi_12,Chimu_32) );
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#define TM_PROJMEM(ptr) \
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@ -338,200 +338,200 @@ Author: paboyle <paboyle@ph.ed.ac.uk>
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VTIMESMINUSI2(UChi_01,psi_31,TMP) \
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VTIMESMINUSI2(UChi_02,psi_32,TMP) \
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);
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// NB could save 6 ops using addsub => 12 cycles
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// NB could save 6 ops using addsub => 12 cycles
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#define XP_RECON_ACCUM __asm__ ( \
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VZERO(TMP)\
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VACCTIMESMINUSI0(UChi_00,psi_30,Z3)\
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VACCTIMESMINUSI0(UChi_10,psi_20,Z0)\
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VACCTIMESMINUSI0(UChi_01,psi_31,Z4)\
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VACCTIMESMINUSI0(UChi_11,psi_21,Z1)\
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VACCTIMESMINUSI0(UChi_02,psi_32,Z5)\
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VACCTIMESMINUSI0(UChi_12,psi_22,Z2)\
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VADD(UChi_00,psi_00,psi_00)\
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VADD(UChi_10,psi_10,psi_10)\
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VADD(UChi_01,psi_01,psi_01)\
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VADD(UChi_11,psi_11,psi_11)\
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VADD(UChi_02,psi_02,psi_02)\
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VADD(UChi_12,psi_12,psi_12)\
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VACCTIMESMINUSI1(UChi_00,psi_30,Z3)\
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VACCTIMESMINUSI1(UChi_10,psi_20,Z0)\
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VACCTIMESMINUSI1(UChi_01,psi_31,Z4)\
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VACCTIMESMINUSI1(UChi_11,psi_21,Z1)\
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VACCTIMESMINUSI1(UChi_02,psi_32,Z5)\
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VACCTIMESMINUSI1(UChi_12,psi_22,Z2)\
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VACCTIMESMINUSI2(UChi_10,psi_20,Z0)\
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VACCTIMESMINUSI2(UChi_11,psi_21,Z1)\
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VACCTIMESMINUSI2(UChi_12,psi_22,Z2)\
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VACCTIMESMINUSI2(UChi_00,psi_30,Z3)\
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VACCTIMESMINUSI2(UChi_01,psi_31,Z4)\
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VACCTIMESMINUSI2(UChi_02,psi_32,Z5)\
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VZERO(TMP) \
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VACCTIMESMINUSI0(UChi_00,psi_30,Z3) \
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VACCTIMESMINUSI0(UChi_10,psi_20,Z0) \
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VACCTIMESMINUSI0(UChi_01,psi_31,Z4) \
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VACCTIMESMINUSI0(UChi_11,psi_21,Z1) \
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VACCTIMESMINUSI0(UChi_02,psi_32,Z5) \
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VACCTIMESMINUSI0(UChi_12,psi_22,Z2) \
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VADD(UChi_00,psi_00,psi_00) \
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VADD(UChi_10,psi_10,psi_10) \
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VADD(UChi_01,psi_01,psi_01) \
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VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VACCTIMESMINUSI1(UChi_00,psi_30,Z3) \
|
||||
VACCTIMESMINUSI1(UChi_10,psi_20,Z0) \
|
||||
VACCTIMESMINUSI1(UChi_01,psi_31,Z4) \
|
||||
VACCTIMESMINUSI1(UChi_11,psi_21,Z1) \
|
||||
VACCTIMESMINUSI1(UChi_02,psi_32,Z5) \
|
||||
VACCTIMESMINUSI1(UChi_12,psi_22,Z2) \
|
||||
VACCTIMESMINUSI2(UChi_10,psi_20,Z0) \
|
||||
VACCTIMESMINUSI2(UChi_11,psi_21,Z1) \
|
||||
VACCTIMESMINUSI2(UChi_12,psi_22,Z2) \
|
||||
VACCTIMESMINUSI2(UChi_00,psi_30,Z3) \
|
||||
VACCTIMESMINUSI2(UChi_01,psi_31,Z4) \
|
||||
VACCTIMESMINUSI2(UChi_02,psi_32,Z5) \
|
||||
);
|
||||
|
||||
#define XM_RECON __asm__ ( \
|
||||
VZERO(TMP)\
|
||||
VTIMESI0(UChi_00,psi_30,TMP)\
|
||||
VTIMESI0(UChi_10,psi_20,TMP)\
|
||||
VTIMESI0(UChi_01,psi_31,TMP)\
|
||||
VTIMESI0(UChi_11,psi_21,TMP)\
|
||||
VTIMESI0(UChi_02,psi_32,TMP)\
|
||||
VTIMESI0(UChi_12,psi_22,TMP)\
|
||||
VMOV(UChi_00,psi_00)\
|
||||
VMOV(UChi_10,psi_10)\
|
||||
VMOV(UChi_01,psi_01)\
|
||||
VMOV(UChi_11,psi_11)\
|
||||
VMOV(UChi_02,psi_02)\
|
||||
VMOV(UChi_12,psi_12)\
|
||||
VTIMESI1(UChi_00,psi_30,TMP)\
|
||||
VTIMESI1(UChi_10,psi_20,TMP)\
|
||||
VTIMESI1(UChi_01,psi_31,TMP)\
|
||||
VTIMESI1(UChi_11,psi_21,TMP)\
|
||||
VTIMESI1(UChi_02,psi_32,TMP)\
|
||||
VTIMESI1(UChi_12,psi_22,TMP)\
|
||||
VTIMESI2(UChi_10,psi_20,TMP)\
|
||||
VTIMESI2(UChi_11,psi_21,TMP)\
|
||||
VTIMESI2(UChi_12,psi_22,TMP)\
|
||||
VTIMESI2(UChi_00,psi_30,TMP)\
|
||||
VTIMESI2(UChi_01,psi_31,TMP)\
|
||||
VTIMESI2(UChi_02,psi_32,TMP)\
|
||||
VZERO(TMP) \
|
||||
VTIMESI0(UChi_00,psi_30,TMP) \
|
||||
VTIMESI0(UChi_10,psi_20,TMP) \
|
||||
VTIMESI0(UChi_01,psi_31,TMP) \
|
||||
VTIMESI0(UChi_11,psi_21,TMP) \
|
||||
VTIMESI0(UChi_02,psi_32,TMP) \
|
||||
VTIMESI0(UChi_12,psi_22,TMP) \
|
||||
VMOV(UChi_00,psi_00) \
|
||||
VMOV(UChi_10,psi_10) \
|
||||
VMOV(UChi_01,psi_01) \
|
||||
VMOV(UChi_11,psi_11) \
|
||||
VMOV(UChi_02,psi_02) \
|
||||
VMOV(UChi_12,psi_12) \
|
||||
VTIMESI1(UChi_00,psi_30,TMP) \
|
||||
VTIMESI1(UChi_10,psi_20,TMP) \
|
||||
VTIMESI1(UChi_01,psi_31,TMP) \
|
||||
VTIMESI1(UChi_11,psi_21,TMP) \
|
||||
VTIMESI1(UChi_02,psi_32,TMP) \
|
||||
VTIMESI1(UChi_12,psi_22,TMP) \
|
||||
VTIMESI2(UChi_10,psi_20,TMP) \
|
||||
VTIMESI2(UChi_11,psi_21,TMP) \
|
||||
VTIMESI2(UChi_12,psi_22,TMP) \
|
||||
VTIMESI2(UChi_00,psi_30,TMP) \
|
||||
VTIMESI2(UChi_01,psi_31,TMP) \
|
||||
VTIMESI2(UChi_02,psi_32,TMP) \
|
||||
);
|
||||
|
||||
#define XM_RECON_ACCUM __asm__ ( \
|
||||
VACCTIMESI0(UChi_10,psi_20,Z0)\
|
||||
VACCTIMESI0(UChi_00,psi_30,Z3)\
|
||||
VACCTIMESI0(UChi_11,psi_21,Z1)\
|
||||
VACCTIMESI0(UChi_01,psi_31,Z4)\
|
||||
VACCTIMESI0(UChi_12,psi_22,Z2)\
|
||||
VACCTIMESI0(UChi_02,psi_32,Z5)\
|
||||
VACCTIMESI0(UChi_10,psi_20,Z0) \
|
||||
VACCTIMESI0(UChi_00,psi_30,Z3) \
|
||||
VACCTIMESI0(UChi_11,psi_21,Z1) \
|
||||
VACCTIMESI0(UChi_01,psi_31,Z4) \
|
||||
VACCTIMESI0(UChi_12,psi_22,Z2) \
|
||||
VACCTIMESI0(UChi_02,psi_32,Z5) \
|
||||
\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
\
|
||||
VACCTIMESI1(UChi_10,psi_20,Z0)\
|
||||
VACCTIMESI1(UChi_00,psi_30,Z3)\
|
||||
VACCTIMESI1(UChi_11,psi_21,Z1)\
|
||||
VACCTIMESI1(UChi_01,psi_31,Z4)\
|
||||
VACCTIMESI1(UChi_12,psi_22,Z2)\
|
||||
VACCTIMESI1(UChi_02,psi_32,Z5)\
|
||||
VACCTIMESI2(UChi_10,psi_20,Z0)\
|
||||
VACCTIMESI2(UChi_11,psi_21,Z1)\
|
||||
VACCTIMESI2(UChi_12,psi_22,Z2)\
|
||||
VACCTIMESI2(UChi_00,psi_30,Z3)\
|
||||
VACCTIMESI2(UChi_01,psi_31,Z4)\
|
||||
VACCTIMESI2(UChi_02,psi_32,Z5)\
|
||||
VACCTIMESI1(UChi_10,psi_20,Z0) \
|
||||
VACCTIMESI1(UChi_00,psi_30,Z3) \
|
||||
VACCTIMESI1(UChi_11,psi_21,Z1) \
|
||||
VACCTIMESI1(UChi_01,psi_31,Z4) \
|
||||
VACCTIMESI1(UChi_12,psi_22,Z2) \
|
||||
VACCTIMESI1(UChi_02,psi_32,Z5) \
|
||||
VACCTIMESI2(UChi_10,psi_20,Z0) \
|
||||
VACCTIMESI2(UChi_11,psi_21,Z1) \
|
||||
VACCTIMESI2(UChi_12,psi_22,Z2) \
|
||||
VACCTIMESI2(UChi_00,psi_30,Z3) \
|
||||
VACCTIMESI2(UChi_01,psi_31,Z4) \
|
||||
VACCTIMESI2(UChi_02,psi_32,Z5) \
|
||||
);
|
||||
|
||||
#define YP_RECON_ACCUM __asm__ ( \
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VADD(UChi_10,psi_20,psi_20)\
|
||||
VADD(UChi_11,psi_21,psi_21)\
|
||||
VADD(UChi_12,psi_22,psi_22)\
|
||||
VSUB(UChi_00,psi_30,psi_30)\
|
||||
VSUB(UChi_01,psi_31,psi_31)\
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VADD(UChi_10,psi_20,psi_20) \
|
||||
VADD(UChi_11,psi_21,psi_21) \
|
||||
VADD(UChi_12,psi_22,psi_22) \
|
||||
VSUB(UChi_00,psi_30,psi_30) \
|
||||
VSUB(UChi_01,psi_31,psi_31) \
|
||||
VSUB(UChi_02,psi_32,psi_32) );
|
||||
|
||||
#define YM_RECON_ACCUM __asm__ ( \
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VSUB(UChi_10,psi_20,psi_20)\
|
||||
VSUB(UChi_11,psi_21,psi_21)\
|
||||
VSUB(UChi_12,psi_22,psi_22)\
|
||||
VADD(UChi_00,psi_30,psi_30)\
|
||||
VADD(UChi_01,psi_31,psi_31)\
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VSUB(UChi_10,psi_20,psi_20) \
|
||||
VSUB(UChi_11,psi_21,psi_21) \
|
||||
VSUB(UChi_12,psi_22,psi_22) \
|
||||
VADD(UChi_00,psi_30,psi_30) \
|
||||
VADD(UChi_01,psi_31,psi_31) \
|
||||
VADD(UChi_02,psi_32,psi_32) );
|
||||
|
||||
#define ZP_RECON_ACCUM __asm__ ( \
|
||||
VACCTIMESMINUSI0(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESI0(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESMINUSI0(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESI0(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESMINUSI0(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESI0(UChi_12,psi_32,Z5)\
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VACCTIMESMINUSI1(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESI1(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESMINUSI1(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESI1(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESMINUSI1(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESI1(UChi_12,psi_32,Z5)\
|
||||
VACCTIMESMINUSI2(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESMINUSI2(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESMINUSI2(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESI2(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESI2(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESI2(UChi_12,psi_32,Z5)\
|
||||
VACCTIMESMINUSI0(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESI0(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESMINUSI0(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESI0(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESMINUSI0(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESI0(UChi_12,psi_32,Z5) \
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VACCTIMESMINUSI1(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESI1(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESMINUSI1(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESI1(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESMINUSI1(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESI1(UChi_12,psi_32,Z5) \
|
||||
VACCTIMESMINUSI2(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESMINUSI2(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESMINUSI2(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESI2(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESI2(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESI2(UChi_12,psi_32,Z5) \
|
||||
);
|
||||
|
||||
#define ZM_RECON_ACCUM __asm__ ( \
|
||||
VACCTIMESI0(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESMINUSI0(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESI0(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESMINUSI0(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESI0(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESMINUSI0(UChi_12,psi_32,Z5)\
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VACCTIMESI1(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESMINUSI1(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESI1(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESMINUSI1(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESI1(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESMINUSI1(UChi_12,psi_32,Z5)\
|
||||
VACCTIMESI2(UChi_00,psi_20,Z0)\
|
||||
VACCTIMESI2(UChi_01,psi_21,Z1)\
|
||||
VACCTIMESI2(UChi_02,psi_22,Z2)\
|
||||
VACCTIMESMINUSI2(UChi_10,psi_30,Z3)\
|
||||
VACCTIMESMINUSI2(UChi_11,psi_31,Z4)\
|
||||
VACCTIMESMINUSI2(UChi_12,psi_32,Z5)\
|
||||
VACCTIMESI0(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESMINUSI0(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESI0(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESMINUSI0(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESI0(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESMINUSI0(UChi_12,psi_32,Z5) \
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VACCTIMESI1(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESMINUSI1(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESI1(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESMINUSI1(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESI1(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESMINUSI1(UChi_12,psi_32,Z5) \
|
||||
VACCTIMESI2(UChi_00,psi_20,Z0) \
|
||||
VACCTIMESI2(UChi_01,psi_21,Z1) \
|
||||
VACCTIMESI2(UChi_02,psi_22,Z2) \
|
||||
VACCTIMESMINUSI2(UChi_10,psi_30,Z3) \
|
||||
VACCTIMESMINUSI2(UChi_11,psi_31,Z4) \
|
||||
VACCTIMESMINUSI2(UChi_12,psi_32,Z5) \
|
||||
);
|
||||
|
||||
#define TP_RECON_ACCUM __asm__ ( \
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VADD(UChi_00,psi_20,psi_20)\
|
||||
VADD(UChi_10,psi_30,psi_30)\
|
||||
VADD(UChi_01,psi_21,psi_21)\
|
||||
VADD(UChi_11,psi_31,psi_31)\
|
||||
VADD(UChi_02,psi_22,psi_22)\
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VADD(UChi_00,psi_20,psi_20) \
|
||||
VADD(UChi_10,psi_30,psi_30) \
|
||||
VADD(UChi_01,psi_21,psi_21) \
|
||||
VADD(UChi_11,psi_31,psi_31) \
|
||||
VADD(UChi_02,psi_22,psi_22) \
|
||||
VADD(UChi_12,psi_32,psi_32) );
|
||||
|
||||
#define TM_RECON_ACCUM __asm__ ( \
|
||||
VADD(UChi_00,psi_00,psi_00)\
|
||||
VADD(UChi_10,psi_10,psi_10)\
|
||||
VADD(UChi_01,psi_01,psi_01)\
|
||||
VADD(UChi_11,psi_11,psi_11)\
|
||||
VADD(UChi_02,psi_02,psi_02)\
|
||||
VADD(UChi_12,psi_12,psi_12)\
|
||||
VSUB(UChi_00,psi_20,psi_20)\
|
||||
VSUB(UChi_10,psi_30,psi_30)\
|
||||
VSUB(UChi_01,psi_21,psi_21)\
|
||||
VSUB(UChi_11,psi_31,psi_31)\
|
||||
VSUB(UChi_02,psi_22,psi_22)\
|
||||
VADD(UChi_00,psi_00,psi_00) \
|
||||
VADD(UChi_10,psi_10,psi_10) \
|
||||
VADD(UChi_01,psi_01,psi_01) \
|
||||
VADD(UChi_11,psi_11,psi_11) \
|
||||
VADD(UChi_02,psi_02,psi_02) \
|
||||
VADD(UChi_12,psi_12,psi_12) \
|
||||
VSUB(UChi_00,psi_20,psi_20) \
|
||||
VSUB(UChi_10,psi_30,psi_30) \
|
||||
VSUB(UChi_01,psi_21,psi_21) \
|
||||
VSUB(UChi_11,psi_31,psi_31) \
|
||||
VSUB(UChi_02,psi_22,psi_22) \
|
||||
VSUB(UChi_12,psi_32,psi_32) );
|
||||
|
||||
#define AVX512_PF_L1
|
||||
|
||||
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Reference in New Issue
Block a user