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Update todo list
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TODO
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TODO
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TODO:
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TODO:
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---------------
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GPU branch code item work list
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GPU branch code item work list
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-----------------------------
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-----------------------------
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- Audit NAMESPACE CHANGES
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- Audit HMC timestep / traj length size
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- Verify HMC one flavour ratio; suspect dH too big
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- pragma once uniformly
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- GPU offload reductions; thrust initial ; inclusive_scan vs reduce?
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- GPU offload reductions; thrust initial ; inclusive_scan vs reduce?
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- Audit changes
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- Accelerate the cshift
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- thread_loop interface revisit.
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- Accelerate non-dslash elements of Mobius; check accelerator_loop uniformly used in fermion operators
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- Gamma tables on GPU
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- Mobius kernel fusion.
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- Reread WilsonKernels and check diffs
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- thread_loop interface revisit.
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- pragma once uniformly
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- Audit changes
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- Audit NAMESPACE CHANGES
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- Verify HMC one flavour ratio; suspect dH too big; verify timestep with Guido.
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- Staggered kernels inline for GPU
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- Single GPU simd target (VGPU)
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- Lebesgue reorder in all kernels
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- merge2 where is it used. Audit routines, comment out and check compile.
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- AVX512 still broken, lebesgue order missing ?
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- Neon ??
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-----------------------------
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Physics item work list:
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2)- Consistent linear solver flop count/rate -- PARTIAL, time but no flop/s yet
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4)- Multigrid Wilson and DWF, compare to other Multigrid implementations
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5)- HDCR resume
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-----------------------------
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DONE
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- Audit HMC timestep / traj length size
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- GPU offload reductions; thrust initial ; inclusive_scan vs reduce?
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- Pragmas.h - prune and remove strong_inline (?)
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- GPU offload reductions; thrust initial ; inclusive_scan vs reduce?
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- Remove old parallel_for macros, fix errors
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- - Need (1) omp parallel for <-- thread_loop
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- - Need (1) omp parallel for <-- thread_loop
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- - (2) omp for
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- - (2) omp for
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- - (3) omp for collapse(n)
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- - (3) omp for collapse(n)
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@ -37,27 +64,6 @@ GPU branch code item work list
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and same "in_region".
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and same "in_region".
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- Remove old parallel_for macros, fix errors
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- check accelerator_loop uniformly used in fermion operators
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- Gamma tables on GPU
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- Accelerate the cshift
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- Accelerate non-dslash elements of Mobius
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- Mobius kernel fusion.
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- Staggered kernels inline for GPU
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- Reread WilsonKernels and check diffs
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- Single GPU simd target (VGPU)
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- Lebesgue reorder in all kernels
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- merge2 where used. Audit routines, comment out and check compile.
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- Pragmas.h - prune and remove strong_inline (?)
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-
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-----------------------------
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Physics item work list:
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2)- Consistent linear solver flop count/rate -- PARTIAL, time but no flop/s yet
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4)- Multigrid Wilson and DWF, compare to other Multigrid implementations
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5)- HDCR resume
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-----------------------------
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Nov 2018
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Nov 2018
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1)- BG/Q port and check ; Andrew says ok.
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1)- BG/Q port and check ; Andrew says ok.
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