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Memory Vector UVM and Lattice alignedAllocator separate
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@@ -44,14 +44,14 @@ NAMESPACE_BEGIN(Grid);
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////////////////////////////////////////////////////////////////////////////
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enum ViewAdvise {
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AdviseDefault = 0x0, // Regular data
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AdviseInfrequentUse = 0x1, // Advise that the data is used infrequently. This can
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AdviseInfrequentUse = 0x1 // Advise that the data is used infrequently. This can
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// significantly influence performance of bulk storage.
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AdviseTransient = 0x2, // Data will mostly be read. On some architectures
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// AdviseTransient = 0x2, // Data will mostly be read. On some architectures
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// enables read-only copies of memory to be kept on
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// host and device.
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AdviseAcceleratorWriteDiscard = 0x4 // Field will be written in entirety on device
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// AdviseAcceleratorWriteDiscard = 0x4 // Field will be written in entirety on device
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};
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@@ -80,7 +80,7 @@ private:
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} AllocationCacheEntry;
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static const int NallocCacheMax=128;
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static const int NallocType=4;
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static const int NallocType=6;
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static AllocationCacheEntry Entries[NallocType][NallocCacheMax];
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static int Victim[NallocType];
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static int Ncache[NallocType];
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@@ -95,9 +95,11 @@ private:
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static void *AcceleratorAllocate(size_t bytes);
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static void AcceleratorFree (void *ptr,size_t bytes);
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static void PrintBytes(void);
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public:
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static void Init(void);
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static void *SharedAllocate(size_t bytes);
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static void SharedFree (void *ptr,size_t bytes);
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static void *CpuAllocate(size_t bytes);
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static void CpuFree (void *ptr,size_t bytes);
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