Allow resize of the shared memory buffers

TODO

@@ -1,16 +1,32 @@
 TODO:
 ---------------
 
-Large item work list:
+Code item work list
+
+a) namespaces & indentation
+ GRID_BEGIN_NAMESPACE();
+ GRID_END_NAMESPACE();
+-- delete QCD namespace
+
+b) GPU branch
+- start branch
+- Increase Macro use in core library support; prepare for change
+- Audit volume of "device" code
+- Virtual function audit
+- Start port once Nvidia box is up
+- Cut down volume of code for first port? How?
+
+Physics item work list:
 
 1)- BG/Q port and check ; Andrew says ok.
-3a)- RNG I/O in ILDG/SciDAC (minor)
-3c)- Consistent linear solver flop count/rate -- PARTIAL, time but no flop/s yet
-4)- Physical propagator interface
-6)- Multigrid Wilson and DWF, compare to other Multigrid implementations
-7)- HDCR resume
+2)- Consistent linear solver flop count/rate -- PARTIAL, time but no flop/s yet
+3)- Physical propagator interface
+4)- Multigrid Wilson and DWF, compare to other Multigrid implementations
+5)- HDCR resume
+
 ----------------------------
 Recent DONE 
+-- RNG I/O in ILDG/SciDAC (minor) 
 -- Precision conversion and sort out localConvert      <-- partial/easy
 -- Conserved currents (Andrew)
 -- Split grid