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pulled SVE typedefs out of Optimization

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This commit is contained in:
nmeyer-ur
2020-05-08 11:04:21 +02:00
parent 0893b4e552
commit e64bec8c8e
1 changed files with 11 additions and 12 deletions
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23
Grid/simd/Grid_a64fx-fixedsize.h
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@@ -43,13 +43,6 @@
#pragma error "Missing SVE feature"
#endif /* __ARM_FEATURE_SVE */
// safety definition, not sure if it's important
#define GEN_SIMD_WIDTH 64u
// low-level API
NAMESPACE_BEGIN(Grid);
NAMESPACE_BEGIN(Optimization);
// gcc 10 features
#if __ARM_FEATURE_SVE_BITS==512
#pragma message("Fixed-size SVE ACLE")
@@ -64,6 +57,12 @@ typedef svuint64_t lutd __attribute__((arm_sve_vector_bits(512))); // LUTs for
#pragma error("Oops. Illegal SVE vector size!?")
#endif /* __ARM_FEATURE_SVE_BITS */
// safety definition, not sure if it's necessary
#define GEN_SIMD_WIDTH 64u
// low-level API
NAMESPACE_BEGIN(Grid);
NAMESPACE_BEGIN(Optimization);
template <typename T>
struct acle{};
@@ -503,7 +502,7 @@ struct Exchange{
vecf r1_v = svext(in1, in1, (uint64_t)8u);
vecf r2_v = svext(in2, in2, (uint64_t)8u);
out1 = svext(r1_v, in2, (uint64_t)8u);
out2 = svext(a1_v, r2_v, (uint64_t)8u);
out2 = svext(in1, r2_v, (uint64_t)8u);
}
static inline void Exchange1(vecf &out1, vecf &out2, vecf in1, vecf in2){
// FIXME
@@ -779,10 +778,10 @@ NAMESPACE_END(Optimization);
//////////////////////////////////////////////////////////////////////////////////////
// Here assign types
typedef Optimization::vech SIMD_Htype; // Reduced precision type
typedef Optimization::vecf SIMD_Ftype; // Single precision type
typedef Optimization::vecd SIMD_Dtype; // Double precision type
typedef Optimization::veci SIMD_Itype; // Integer type
typedef vech SIMD_Htype; // Reduced precision type
typedef vecf SIMD_Ftype; // Single precision type
typedef vecd SIMD_Dtype; // Double precision type
typedef veci SIMD_Itype; // Integer type
// prefetch utilities
inline void v_prefetch0(int size, const char *ptr){};