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Author	SHA1	Message	Date
Peter Boyle	95b640cb6b	10TF/s on 32^3 x 64 on single node	2022-08-04 15:43:52 -04:00
Peter Boyle	2cb5bedc15	Copy stream HIP improvements	2022-08-04 15:24:03 -04:00
Peter Boyle	806b02bddf	Simplify dead code	2022-08-04 15:23:13 -04:00
Peter Boyle	de40395773	More timing. Think I should start to use nvtx and rocmtx ??	2022-08-04 13:37:16 -04:00
Peter Boyle	7ba4788715	Fix	2022-08-04 13:36:44 -04:00
Peter Boyle	06d9ce1a02	Synch ranks on node here for GPU - GPU memcopy	2022-08-04 13:35:56 -04:00
Peter Boyle	75bb6b2b40	Move barrier into the StencilSend begin routine	2022-08-04 13:35:26 -04:00
Peter Boyle	74f10c2dc0	Move barrier into Stencil Send	2022-08-04 13:34:11 -04:00
Peter Boyle	a93d5459d4	Better mpi request completion	2022-07-28 12:18:35 -04:00
Peter Boyle	9c21add0c6	High res timer replaces getttimeofday	2022-07-28 12:14:03 -04:00
Peter Boyle	639aab6563	High res timer instead of gettimeofday	2022-07-28 12:13:35 -04:00
Peter Boyle	8137cc7049	Allways concurrent comms	2022-07-28 12:01:51 -04:00
Peter Boyle	60e63dca1d	Add memory logging channel	2022-07-28 11:39:15 -04:00
Peter Boyle	486409574e	Expanded cach to avoid any allocs in HMC	2022-07-28 11:38:34 -04:00
Peter Boyle	a913b8be12	Dslash self timing. Might want to not have this	2022-07-28 11:37:55 -04:00
Peter Boyle	2239751850	Better logging	2022-07-28 11:37:36 -04:00
Peter Boyle	9b20f1449c	Better timing	2022-07-28 11:37:12 -04:00
Peter Boyle	b99453083d	Updated timing	2022-07-28 11:37:02 -04:00
Peter Boyle	943fbb914d	Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet	2022-07-11 13:48:42 -04:00
Peter Boyle	ca4603580d	Verbose	2022-07-11 13:48:35 -04:00
Peter Boyle	f73db8f1f3	Synch clocks	2022-07-11 13:47:39 -04:00
Peter Boyle	f7217d12d2	World barrier for clock synch	2022-07-11 13:45:31 -04:00
Peter Boyle	fab50c57d9	More loggin	2022-07-11 18:42:27 +01:00
Peter Boyle	3440534fbf	MixedPrec support	2022-07-10 21:35:18 +01:00
Peter Boyle	177b1a7ec6	Mixed prec	2022-07-10 21:34:10 +01:00
Peter Boyle	58182fe345	Different approach to default dirichlet params	2022-07-10 21:32:58 +01:00
Peter Boyle	1f907d330d	Different default params for dirichlet	2022-07-10 21:31:48 +01:00
Peter Boyle	b0fe664e9d	Better force log info	2022-07-10 21:31:25 +01:00
Peter Boyle	c0f8482402	Remove SSC marks	2022-07-07 17:49:36 +01:00
Peter Boyle	3544965f54	Stream doesn't work	2022-07-07 17:49:20 +01:00
Peter Boyle	1f903d9296	Merge branch 'feature/dirichlet' into feature/dirichlet-gparity	2022-07-01 12:12:50 -04:00
Peter Boyle	4df1e0987f	Merge branch 'feature/dirichlet-gparity' of https://github.com/paboyle/Grid into feature/dirichlet-gparity	2022-07-01 09:55:43 -04:00
Peter Boyle	588c2f3cb1	Faster axpy_norm and innerProduct	2022-07-01 09:44:58 -04:00
Peter Boyle	bd99fd608c	Introduce a non-default stream for compute operatoins	2022-07-01 09:42:53 -04:00
Peter Boyle	57b442d0de	Log memory operations	2022-07-01 09:42:17 -04:00
Peter Boyle	751a4562d7	Timing improvement	2022-07-01 09:41:43 -04:00
Peter Boyle	ca66301dee	Remove debug	2022-06-30 14:53:12 -04:00
Peter Boyle	808bb59206	Mixed prec DD-RHMC	2022-06-30 13:50:09 -04:00
Peter Boyle	4b7f51d19d	Create a new RNG file	2022-06-30 13:49:50 -04:00
Peter Boyle	d03152fac4	New file under debug	2022-06-30 13:49:35 -04:00
Peter Boyle	137f190258	Dirichlet implementation	2022-06-30 13:45:07 -04:00
Peter Boyle	53d01312b3	Rough flop counting, need to add M5D, M5Ddag, MooeeInv flops	2022-06-30 13:44:09 -04:00
Peter Boyle	220050822a	Speed up M5D and M5Ddag	2022-06-30 13:43:27 -04:00
Peter Boyle	87ad76d81b	Initialise timeval	2022-06-30 13:42:46 -04:00
Peter Boyle	4ac1094856	Updated config commands	2022-06-27 12:16:24 -04:00
Peter Boyle	d44a57b0af	Allow frequency=0 to disable	2022-06-27 12:15:55 -04:00
Peter Boyle	dc000d10ee	Spelling correction	2022-06-27 12:14:57 -04:00
Peter Boyle	3685f391cf	More verbose CG	2022-06-27 12:11:08 -04:00
Peter Boyle	efd7338a00	Allow dirichlet at round the world link	2022-06-27 12:10:27 -04:00
Peter Boyle	e1e7b1e224	RNG fix	2022-06-27 12:09:52 -04:00