48 Commits

Author	SHA1	Message	Date
Peter Boyle	551a5f8dc8	RRII gpu option	2022-10-11 14:44:55 -04:00
nmeyer-ur	36ea0e222a	type traits for ComplexF/D in VLA patch; cosmetics in VLS intrinsics	2020-06-13 13:42:35 +02:00
nmeyer-ur	433766ac62	revert Add/SubTimesI and prefetching in stencil ... This reverts commit 9b2699226c7a3ca8d45f843f4f8e4658fa082163.	2020-06-08 12:02:53 +02:00
nmeyer-ur	9872c76825	introduce AddTimesI and SubTimesI; slight benefit in operators, but < 1%; breaks all other impls	2020-06-03 15:20:13 +02:00
nmeyer-ur	5ee3ea2144	round-up after testing of prefetches in stencil close	2020-06-03 11:58:20 +02:00
nmeyer-ur	5050833b42	revert changes due to performance penalty in Wilson using MPI	2020-06-02 13:08:57 +02:00
nmeyer-ur	7bee4ebb54	correct predication for svcadd	2020-06-02 10:51:39 +02:00
nmeyer-ur	71cf9851e7	correct type for vecd in TimesI and TimesMinusI	2020-06-02 10:44:15 +02:00
nmeyer-ur	b4735c9904	correct zero in svcadd	2020-06-02 10:38:05 +02:00
nmeyer-ur	9b2699226c	use fcadd in TimesI and TimesMinusI instead of tbl and neg	2020-06-02 10:32:44 +02:00
nmeyer-ur	8c5a5fdfce	disable fcmla in vector type building for VLA	2020-05-21 19:41:42 +02:00
nmeyer-ur	046b1cbbc0	enable fcmla in tensor arithmetics; fixed-size works, VLA does not compile	2020-05-21 19:39:07 +02:00
nmeyer-ur	cd27f1005d	clean up; Exch1 sp integrate, tested, working	2020-05-21 08:45:43 +02:00
nmeyer-ur	f8c0a59221	clean up; Exch1 dp integrate, tested, working	2020-05-21 02:48:14 +02:00
nmeyer-ur	832485699f	save some cycles in HtoD and DtoH by direct instead of multi-pass conversion	2020-05-20 23:04:35 +02:00
nmeyer-ur	81484a4760	symmetrize Mult and MultAddComplex	2020-05-20 22:36:45 +02:00
nmeyer-ur	9a86059761	symmetrize VLA and fixed size build messages	2020-05-20 20:05:42 +02:00
nmeyer-ur	9e085bd04e	guard prevents multiple A64FX build messages	2020-05-20 19:16:30 +02:00
nmeyer-ur	323a651c71	correct typo	2020-05-18 19:58:27 +02:00
nmeyer-ur	9f212679f1	support fcmla in vector_types, untested	2020-05-18 19:55:18 +02:00
nmeyer-ur	50b1db1e8b	implemented correct _m form (using 3 operands instead of 2)	2020-05-15 10:01:05 +02:00
nmeyer-ur	10a34312dc	some fixed-size code clean up	2020-05-14 23:20:16 +02:00
nmeyer-ur	db8c0e7584	replaced _x form with _m form when using even/odd predication	2020-05-14 23:17:35 +02:00
nmeyer-ur	d15ccad8a7	switched to vec* in Reduce	2020-05-12 20:41:14 +02:00
nmeyer-ur	b7c76ede29	Removed some assertions in Test_simd and removed exit() in Reduce	2020-05-11 22:43:00 +02:00
nmeyer-ur	05edf803bd	corrected typo	2020-05-12 03:59:59 +09:00
nmeyer-ur	78b8e40f83	switched to gcc's internal data types	2020-05-11 18:11:23 +02:00
nmeyer-ur	b2fd8b993a	fixed-size clean up	2020-05-09 22:53:42 +02:00
nmeyer-ur	291ee8c3d0	updated fixed-size implementation; only Exch1 and prefetches missing	2020-05-09 22:18:02 +02:00
nmeyer-ur	e1a5b3ea49	unions for tables eliminate explicit loads, gcc does not complain	2020-05-09 21:21:57 +02:00
nmeyer-ur	55a55660cb	reverted changes	2020-05-09 12:48:42 +02:00
nmeyer-ur	4bc2ad2894	API change v2	2020-05-08 15:00:25 +02:00
nmeyer-ur	798af3e68f	retry changing StoD API	2020-05-08 14:34:59 +02:00
nmeyer-ur	71a7350a85	changed 2nd argument in Reduce to native vector type	2020-05-08 12:26:51 +02:00
nmeyer-ur	6f79369955	trying to get rid of macro definition error	2020-05-08 12:19:24 +02:00
nmeyer-ur	fbed02690d	some changes in breaking out A64FX: use -DA64FXFIXEDSIZE for fixed size, but also define GEN	2020-05-08 12:05:31 +02:00
nmeyer-ur	39f3ae5b1d	corrected more types	2020-05-08 11:07:14 +02:00
nmeyer-ur	e64bec8c8e	pulled SVE typedefs out of Optimization	2020-05-08 11:04:21 +02:00
nmeyer-ur	0893b4e552	fixed typos in PrecisionChange	2020-05-08 10:59:07 +02:00
nmeyer-ur	92f0f29670	fixed double overloading vecf in Div, corrected typos	2020-05-08 10:57:23 +02:00
nmeyer-ur	48a340a9d1	GEN seems to defined by default -> some fixes applied	2020-05-08 10:47:49 +02:00
nmeyer-ur	f45621109b	placed typedefs in Optimization	2020-05-08 10:41:52 +02:00
nmeyer-ur	267cce66a1	added more debug output	2020-05-08 10:29:28 +02:00
nmeyer-ur	3417147b11	added real fma, corrected typos in tbls; integrated, must supply A64FXGCC with GEN in configure	2020-05-08 10:20:19 +02:00
nmeyer-ur	b338719bc8	first transition to fixed-size done, excl. Exch; next step: integration	2020-05-07 22:33:28 +02:00
nmeyer-ur	2b81cbe2c2	first attempt to introduce tables using fixed-size; still incomplete	2020-05-07 22:01:19 +02:00
nmeyer-ur	acff9d6ed2	transition to fixed size data types almost done; still incomplete	2020-05-07 21:24:07 +02:00
nmeyer-ur	a306a49788	first mods for fixed size; still incomplete	2020-05-07 19:07:49 +02:00