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Updating for version 0.7.0. Adding HMC docs

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This commit is contained in:
Guido Cossu
2017-05-12 11:10:36 +01:00
parent 0fb307ae17
commit 2099047b06
8 changed files with 173 additions and 14 deletions
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2
_data/navigation.yml
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@ -64,5 +64,5 @@ docs:
disable: "yes"
- title: "HMC"
url: /docs/theories/hmc/
disable: "yes"
disable: "no"

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_pages/docs/bug_report.md
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@ -18,10 +18,10 @@ We also suggest to have a brief look at the [closed issues pages](https://github
{% capture notice-text %}
1. Check that the code is pointing to the `HEAD` of `develop` or any commit in `master` which is tagged with a version number.
2. Give a description of the target platform (CPU, network, compiler).
2. Give a description of the target platform (CPU, network, compiler). Please give the full CPU part description, using for example `cat /proc/cpuinfo | grep 'model name' | uniq` (Linux) or `sysctl machdep.cpu.brand_string` (macOS) and the full output the `--version` option of your compiler.
3. Give the exact `configure` command used.
4. Attach `config.log`.
5. Attach `config.summary`.
5. Attach `grid.config.summary`.
6. Attach the output of `make V=1`.
7. Describe the issue and any previous attempt to solve it. If relevant, show how to reproduce the issue using a minimal working example.
{% endcapture %}

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_pages/docs/knl_build.md
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@ -10,7 +10,7 @@ sidebar:
nav : docs
---
{% include base_path %}
The information included in this page has been updated on *November 2016* and it is valid for the release version 0.6.0.
The information included in this page has been updated on *May 2017* and it is valid for the [release version 0.7.0](https://github.com/paboyle/Grid/tree/release/v0.7.0).
The following configuration is recommended for the [Intel Knights Landing](http://ark.intel.com/products/codename/48999/Knights-Landing) platform:

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@ -37,7 +37,7 @@ cd build
```
where `--enable-precision=` sets the default precision,
`--enable-simd=` sets the SIMD type, `--enable-
`--enable-simd=` sets the [SIMD type](/Grid/docs/simd_targets/), `--enable-
comms=`, and `<path>` should be replaced by the prefix path where you want to
install Grid (optional). Other options are detailed in the next section, you can also use `configure
--help` to display them. Like with any other program using GNU autotool, the
@ -56,6 +56,7 @@ To minimise the build time, only the tests at the root of the `tests` directory
``` bash
make -C tests/<subdir> tests
```
If you want to build all the tests at once just use `make tests`.
## Build configuration options
@ -73,7 +74,7 @@ Here we report the more common ones.
- `--enable-simd=<code>`: setup Grid for the SIMD target `<code>` (default: `GEN`). [List of possible SIMD targets](/Grid/docs/simd_targets/).
- `--enable-precision={single|double}`: set the default precision (default: `double`).
- `--enable-precision=<comm>`: Use `<comm>` for message passing (default: `none`). [List of possible comm targets](/Grid/docs/comm_interfaces/).
- `--enable-rng={ranlux48|mt19937|sitmo}`: choose the RNG (default: `ranlux48`).
- `--enable-rng={sitmo|ranlux48|mt19937}`: choose the RNG (default: `sitmo`).
- `--disable-timers`: disable system dependent high-resolution timers.
- `--enable-chroma`: enable Chroma regression tests. A compiled version of Chroma is assumed to be present.
@ -81,6 +82,6 @@ Here we report the more common ones.
More details on the *Getting started* menu entries on the left.
This document was updated on November 2016.
This document was updated on May 2017.
{: .notice}

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_pages/docs/simd_targets.md
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@ -28,14 +28,15 @@ Alternatively, some CPU codenames can be directly used:
| `<code>` | Description |
| ----------- | -------------------------------------- |
| `KNC` | [Intel Xeon Phi codename Knights Corner](http://ark.intel.com/products/codename/57721/Knights-Corner) |
| `KNL` | [Intel Xeon Phi codename Knights Landing](http://ark.intel.com/products/codename/48999/Knights-Landing) |
| `BGQ` | Blue Gene/Q |
#### Notes (November 2016):
- We are currently supporting AVX512 only for the Intel compiler. GCC and clang will appear in future versions, if the compilers provide sufficient support.
#### Notes (May 2017):
- We currently support AVX512 only for the Intel compiler. Support for GCC and clang will appear in future versions of Grid when the AVX512 support within GCC and clang will be more advanced.
- For BG/Q only [bgclang](http://trac.alcf.anl.gov/projects/llvm-bgq) is supported. We do not presently plan to support more compilers for this platform.
- BG/Q performances are currently rather poor. This is being investigated for future versions.
- The vector size for the `GEN` target can be specified with the `configure` script option `--enable-gen-simd-width`.
{% include paginator.html %}

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@ -20,6 +20,7 @@ The current status is
|---------- | ------ |
| [Master](https://travis-ci.org/paboyle/Grid) | [![Build Status](https://travis-ci.org/paboyle/Grid.svg?branch=master)](https://travis-ci.org/paboyle/Grid) |
| [Develop](https://travis-ci.org/paboyle/Grid) | [![Build Status](https://travis-ci.org/paboyle/Grid.svg?branch=develop)](https://travis-ci.org/paboyle/Grid) |
| [Release 0.7.0](https://github.com/paboyle/Grid/tree/release/v0.7.0) | [![Build Status](https://travis-ci.org/paboyle/Grid.svg?branch=release/v0.7.0)](https://github.com/paboyle/Grid/tree/release/v0.7.0) |
### Automated tests
@ -29,10 +30,12 @@ Travis will test the compilation workflow for single and double precision versio
- clang 3.7.0 on Ubuntu 14.04
- clang 3.8.0 on Ubuntu 14.04
- gcc 5.4.1 on Ubuntu 14.04
- gcc 4.9.4 on Ubuntu 14.04
- clang LLVM 7.0 on OSX (x86_64-apple-darwin15.5.0)
- gcc 4.9.4 on Ubuntu 14.04.1
- Apple LLVM version 8.1.0 (clang-802.0.42) on OSX (x86_64-apple-darwin16.5.0)
Due to the limitations of the Travis virtual machines, the archictecture is limited to SSE4.
Due to the limitations of the Travis virtual machines, the archictecture is limited to SSE4 and few tests.
May 2017: a new server using [TeamCity](https://www.jetbrains.com/teamcity/specials/teamcity/teamcity.html?gclid=CjwKEAjwutXIBRDV7-SDvdiNsUoSJACIlTqlygt_V8-PqWvjV23oAj8wf2suNmct9-sFfplBFYctzBoCnTvw_wcB&gclsrc=aw.ds.ds&dclid=COOh9rPt6dMCFYOmUQodkpwLfQ) is being setup for extensive testing of every commit.
{% include paginator.html %}

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@ -0,0 +1,119 @@
---
layout: single
title : "Documentation"
author_profile: false
excerpt: "Using HMC"
header:
overlay_color: "#5DADE2"
permalink: /docs/theories/hmc/
sidebar:
nav : docs
---
### Using HMC
Using HMC in Grid version 0.7.0
These are the instructions to use the Generalised HMC on Grid version 0.7.0.
Disclaimer: GRID is still under active development so any information provided here can be changed in future releases.
Command line options
===================
(relevant file GenericHMCrunner.h)
List of command line options, specific for HMC
* ```--StartingType <string>```
Choices: HotStart, ColdStart, TepidStart, CheckpointStart
* ```--StartingTrajectory <integer>```
Only for CheckpointStart, ignored otherwise.
Expected format of the filename is ```<config prefix>.<integer>``` for the configuration and ```<rng file prefix>.<integer>```
* ```--Trajectories <integer>```
Number of trajectories in this run, excluding the thermalization steps. Default: 1.
* ```--Thermalizations <integers>```
Default: 10
* ```--ParameterFile <string>```
The filename for the input parameters deserialisation.
All of them, except the starting trajectory, can be overridden by the input file (but this behaviour can be easily changed by the user writing the source file).
HMC controls
===========
The lines
std::vector<int> SerSeed({1, 2, 3, 4, 5});
std::vector<int> ParSeed({6, 7, 8, 9, 10});
define the seeds for the serial and the parallel RNG.
The line
TheHMC.MDparameters.set(20, 1.0);// MDsteps, traj length
declares the number of molecular dynamics steps and the total trajectory length.
Actions
======
Action names are defined in the file
lib/qcd/Actions.h
Gauge actions list:
WilsonGaugeActionR;
WilsonGaugeActionF;
WilsonGaugeActionD;
PlaqPlusRectangleActionR;
PlaqPlusRectangleActionF;
PlaqPlusRectangleActionD;
IwasakiGaugeActionR;
IwasakiGaugeActionF;
IwasakiGaugeActionD;
SymanzikGaugeActionR;
SymanzikGaugeActionF;
SymanzikGaugeActionD;
ConjugateWilsonGaugeActionR;
ConjugateWilsonGaugeActionF;
ConjugateWilsonGaugeActionD;
ConjugatePlaqPlusRectangleActionR;
ConjugatePlaqPlusRectangleActionF;
ConjugatePlaqPlusRectangleActionD;
ConjugateIwasakiGaugeActionR;
ConjugateIwasakiGaugeActionF;
ConjugateIwasakiGaugeActionD;
ConjugateSymanzikGaugeActionR;
ConjugateSymanzikGaugeActionF;
ConjugateSymanzikGaugeActionD;
ScalarActionR;
ScalarActionF;
ScalarActionD;
each of these action accept one single parameter at creation time (beta).
Example for creating a Symanzik action with beta=4.0
SymanzikGaugeActionR(4.0)
The suffixes R,F,D in the action names refer to the Real
(the precision is defined at compile time by the --enable-precision flag in the configure),
Float and Double, that force the precision of the action to be 32, 64 bit respectively.

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@ -18,7 +18,42 @@ We are currently working on the full documentation.
Use the sidebar on the left to navigate.
_Nov 2016 : The API description and Lattice Theories sections in the sidebar are work in progress_.
_May 2017 : The API description and Lattice Theories sections in the sidebar are work in progress_.
### Version history
* May 2017 [version 0.7.0](https://github.com/paboyle/Grid/tree/release/v0.7.0)
* November 2016 [version 0.6.0](https://github.com/paboyle/Grid/tree/release/v0.6.0)
### Description
This library provides data parallel C++ container classes with internal memory layout
that is transformed to map efficiently to SIMD architectures. CSHIFT facilities
are provided, similar to HPF and cmfortran, and user control is given over the mapping of
array indices to both MPI tasks and SIMD processing elements.
* Identically shaped arrays then be processed with perfect data parallelisation.
* Such identically shaped arrays are called conformable arrays.
The transformation is based on the observation that Cartesian array processing involves
identical processing to be performed on different regions of the Cartesian array.
The library will both geometrically decompose into MPI tasks and across SIMD lanes.
Local vector loops are parallelised with OpenMP pragmas.
Data parallel array operations can then be specified with a SINGLE data parallel paradigm, but
optimally use MPI, OpenMP and SIMD parallelism under the hood. This is a significant simplification
for most programmers.
The layout transformations are parametrised by the SIMD vector length. This adapts according to the architecture.
Presently SSE4 (128 bit) AVX, AVX2, QPX (256 bit), IMCI, and AVX512 (512 bit) targets are supported (ARM NEON on the way).
These are presented as `vRealF`, `vRealD`, `vComplexF`, and `vComplexD` internal vector data types. These may be useful in themselves for other programmers.
The corresponding scalar types are named `RealF`, `RealD`, `ComplexF` and `ComplexD`.
MPI, OpenMP, and SIMD parallelism are present in the library.
Please see [this paper](https://arxiv.org/abs/1512.03487) for more detail.