mirror of
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Merge pull request #114 from nmeyer-ur/feature/arm-neon
ARM neon intrinsics support Guido: checked and approved
This commit is contained in:
Guido Cossu
GitHub
commit
688a39cfd9
@ -248,6 +248,9 @@ case ${ax_cv_cxx_compiler_vendor} in
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[generic SIMD vector width (in bytes)])
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SIMD_GEN_WIDTH_MSG=" (width= $ac_gen_simd_width)"
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SIMD_FLAGS='';;
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NEONv8)
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AC_DEFINE([NEONV8],[1],[ARMv8 NEON])
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SIMD_FLAGS='';;
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QPX|BGQ)
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AC_DEFINE([QPX],[1],[QPX intrinsics for BG/Q])
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SIMD_FLAGS='';;
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@ -1,11 +1,12 @@
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/*************************************************************************************
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/*************************************************************************************
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Grid physics library, www.github.com/paboyle/Grid
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Grid physics library, www.github.com/paboyle/Grid
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Source file: ./lib/simd/Grid_neon.h
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Copyright (C) 2015
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Author: Nils Meyer <nils.meyer@ur.de>
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Author: Peter Boyle <paboyle@ph.ed.ac.uk>
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Author: neo <cossu@post.kek.jp>
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@ -27,18 +28,27 @@ Author: neo <cossu@post.kek.jp>
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*************************************************************************************/
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/* END LEGAL */
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//----------------------------------------------------------------------
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/*! @file Grid_sse4.h
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@brief Optimization libraries for NEON (ARM) instructions set ARMv8
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/*
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ARMv8 NEON intrinsics layer by
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Nils Meyer <nils.meyer@ur.de>,
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University of Regensburg, Germany
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SFB/TRR55
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Experimental - Using intrinsics - DEVELOPING!
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*/
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// Time-stamp: <2015-07-10 17:45:09 neo>
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//----------------------------------------------------------------------
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//#ifndef ARM_NEON
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//#define ARM_NEON
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#ifndef GEN_SIMD_WIDTH
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#define GEN_SIMD_WIDTH 16u
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#endif
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#include "Grid_generic_types.h"
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#include <arm_neon.h>
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// ARMv8 supports double precision
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namespace Grid {
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namespace Optimization {
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template<class vtype>
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@ -46,16 +56,20 @@ namespace Optimization {
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float32x4_t f;
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vtype v;
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};
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union u128f {
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float32x4_t v;
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float f[4];
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};
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union u128d {
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float64x2_t v;
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double f[4];
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double f[2];
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};
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// half precision
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union u128h {
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float16x8_t v;
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uint16_t f[8];
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};
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struct Vsplat{
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//Complex float
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inline float32x4_t operator()(float a, float b){
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@ -64,31 +78,31 @@ namespace Optimization {
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}
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// Real float
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inline float32x4_t operator()(float a){
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return vld1q_dup_f32(&a);
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return vdupq_n_f32(a);
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}
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//Complex double
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inline float32x4_t operator()(double a, double b){
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float tmp[4]={(float)a,(float)b,(float)a,(float)b};
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return vld1q_f32(tmp);
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inline float64x2_t operator()(double a, double b){
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double tmp[2]={a,b};
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return vld1q_f64(tmp);
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}
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//Real double
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inline float32x4_t operator()(double a){
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return vld1q_dup_f32(&a);
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//Real double // N:tbc
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inline float64x2_t operator()(double a){
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return vdupq_n_f64(a);
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}
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//Integer
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//Integer // N:tbc
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inline uint32x4_t operator()(Integer a){
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return vld1q_dup_u32(&a);
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return vdupq_n_u32(a);
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}
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};
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struct Vstore{
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//Float
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//Float
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inline void operator()(float32x4_t a, float* F){
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vst1q_f32(F, a);
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}
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//Double
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inline void operator()(float32x4_t a, double* D){
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vst1q_f32((float*)D, a);
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inline void operator()(float64x2_t a, double* D){
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vst1q_f64(D, a);
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}
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//Integer
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inline void operator()(uint32x4_t a, Integer* I){
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@ -97,54 +111,54 @@ namespace Optimization {
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};
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struct Vstream{
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//Float
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struct Vstream{ // N:equivalents to _mm_stream_p* in NEON?
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//Float // N:generic
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inline void operator()(float * a, float32x4_t b){
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memcpy(a,&b,4*sizeof(float));
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}
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//Double
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inline void operator()(double * a, float32x4_t b){
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//Double // N:generic
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inline void operator()(double * a, float64x2_t b){
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memcpy(a,&b,2*sizeof(double));
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}
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};
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// Nils: Vset untested; not used currently in Grid at all;
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// git commit 4a8c4ccfba1d05159348d21a9698028ea847e77b
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struct Vset{
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// Complex float
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// Complex float // N:ok
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inline float32x4_t operator()(Grid::ComplexF *a){
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float32x4_t foo;
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return foo;
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float tmp[4]={a[1].imag(),a[1].real(),a[0].imag(),a[0].real()};
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return vld1q_f32(tmp);
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}
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// Complex double
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inline float32x4_t operator()(Grid::ComplexD *a){
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float32x4_t foo;
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return foo;
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// Complex double // N:ok
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inline float64x2_t operator()(Grid::ComplexD *a){
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double tmp[2]={a[0].imag(),a[0].real()};
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return vld1q_f64(tmp);
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}
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// Real float
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// Real float // N:ok
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inline float32x4_t operator()(float *a){
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float32x4_t foo;
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return foo;
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float tmp[4]={a[3],a[2],a[1],a[0]};
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return vld1q_f32(tmp);
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}
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// Real double
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inline float32x4_t operator()(double *a){
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float32x4_t foo;
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return foo;
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// Real double // N:ok
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inline float64x2_t operator()(double *a){
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double tmp[2]={a[1],a[0]};
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return vld1q_f64(tmp);
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}
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// Integer
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// Integer // N:ok
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inline uint32x4_t operator()(Integer *a){
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uint32x4_t foo;
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return foo;
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return vld1q_dup_u32(a);
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}
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};
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// N:leaving as is
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template <typename Out_type, typename In_type>
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struct Reduce{
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//Need templated class to overload output type
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//General form must generate error if compiled
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inline Out_type operator()(In_type in){
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inline Out_type operator()(In_type in){
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printf("Error, using wrong Reduce function\n");
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exit(1);
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return 0;
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@ -184,26 +198,98 @@ namespace Optimization {
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}
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};
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struct MultRealPart{
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inline float32x4_t operator()(float32x4_t a, float32x4_t b){
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float32x4_t re = vtrn1q_f32(a, a);
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return vmulq_f32(re, b);
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}
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inline float64x2_t operator()(float64x2_t a, float64x2_t b){
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float64x2_t re = vzip1q_f64(a, a);
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return vmulq_f64(re, b);
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}
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};
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struct MaddRealPart{
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inline float32x4_t operator()(float32x4_t a, float32x4_t b, float32x4_t c){
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float32x4_t re = vtrn1q_f32(a, a);
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return vfmaq_f32(c, re, b);
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}
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inline float64x2_t operator()(float64x2_t a, float64x2_t b, float64x2_t c){
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float64x2_t re = vzip1q_f64(a, a);
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return vfmaq_f64(c, re, b);
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}
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};
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struct Div{
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// Real float
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inline float32x4_t operator()(float32x4_t a, float32x4_t b){
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return vdivq_f32(a, b);
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}
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// Real double
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inline float64x2_t operator()(float64x2_t a, float64x2_t b){
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return vdivq_f64(a, b);
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}
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};
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struct MultComplex{
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// Complex float
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inline float32x4_t operator()(float32x4_t a, float32x4_t b){
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float32x4_t foo;
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return foo;
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float32x4_t r0, r1, r2, r3, r4;
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// a = ar ai Ar Ai
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// b = br bi Br Bi
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// collect real/imag part, negate bi and Bi
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r0 = vtrn1q_f32(b, b); // br br Br Br
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r1 = vnegq_f32(b); // -br -bi -Br -Bi
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r2 = vtrn2q_f32(b, r1); // bi -bi Bi -Bi
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// the fun part
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r3 = vmulq_f32(r2, a); // bi*ar -bi*ai ...
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r4 = vrev64q_f32(r3); // -bi*ai bi*ar ...
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// fma(a,b,c) = a+b*c
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return vfmaq_f32(r4, r0, a); // ar*br-ai*bi ai*br+ar*bi ...
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// no fma, use mul and add
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//float32x4_t r5;
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//r5 = vmulq_f32(r0, a);
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//return vaddq_f32(r4, r5);
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}
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// Complex double
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inline float64x2_t operator()(float64x2_t a, float64x2_t b){
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float32x4_t foo;
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return foo;
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float64x2_t r0, r1, r2, r3, r4;
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// b = br bi
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// collect real/imag part, negate bi
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r0 = vtrn1q_f64(b, b); // br br
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r1 = vnegq_f64(b); // -br -bi
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r2 = vtrn2q_f64(b, r1); // bi -bi
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// the fun part
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r3 = vmulq_f64(r2, a); // bi*ar -bi*ai
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r4 = vextq_f64(r3,r3,1); // -bi*ai bi*ar
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// fma(a,b,c) = a+b*c
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return vfmaq_f64(r4, r0, a); // ar*br-ai*bi ai*br+ar*bi
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// no fma, use mul and add
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//float64x2_t r5;
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//r5 = vmulq_f64(r0, a);
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//return vaddq_f64(r4, r5);
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}
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};
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struct Mult{
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// Real float
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inline float32x4_t mac(float32x4_t a, float32x4_t b, float32x4_t c){
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return vaddq_f32(vmulq_f32(b,c),a);
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//return vaddq_f32(vmulq_f32(b,c),a);
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return vfmaq_f32(a, b, c);
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}
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inline float64x2_t mac(float64x2_t a, float64x2_t b, float64x2_t c){
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return vaddq_f64(vmulq_f64(b,c),a);
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//return vaddq_f64(vmulq_f64(b,c),a);
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return vfmaq_f64(a, b, c);
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}
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inline float32x4_t operator()(float32x4_t a, float32x4_t b){
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return vmulq_f32(a,b);
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@ -221,89 +307,275 @@ namespace Optimization {
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struct Conj{
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// Complex single
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inline float32x4_t operator()(float32x4_t in){
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return in;
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// ar ai br bi -> ar -ai br -bi
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float32x4_t r0, r1;
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r0 = vnegq_f32(in); // -ar -ai -br -bi
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r1 = vrev64q_f32(r0); // -ai -ar -bi -br
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return vtrn1q_f32(in, r1); // ar -ai br -bi
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}
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// Complex double
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//inline float32x4_t operator()(float32x4_t in){
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// return 0;
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//}
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inline float64x2_t operator()(float64x2_t in){
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float64x2_t r0, r1;
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r0 = vextq_f64(in, in, 1); // ai ar
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r1 = vnegq_f64(r0); // -ai -ar
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return vextq_f64(r0, r1, 1); // ar -ai
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}
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// do not define for integer input
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};
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struct TimesMinusI{
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//Complex single
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inline float32x4_t operator()(float32x4_t in, float32x4_t ret){
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return in;
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// ar ai br bi -> ai -ar ai -br
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float32x4_t r0, r1;
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r0 = vnegq_f32(in); // -ar -ai -br -bi
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r1 = vrev64q_f32(in); // ai ar bi br
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return vtrn1q_f32(r1, r0); // ar -ai br -bi
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}
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//Complex double
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//inline float32x4_t operator()(float32x4_t in, float32x4_t ret){
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// return in;
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//}
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|
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inline float64x2_t operator()(float64x2_t in, float64x2_t ret){
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// a ib -> b -ia
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float64x2_t tmp;
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tmp = vnegq_f64(in);
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return vextq_f64(in, tmp, 1);
|
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}
|
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};
|
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|
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struct TimesI{
|
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//Complex single
|
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inline float32x4_t operator()(float32x4_t in, float32x4_t ret){
|
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//need shuffle
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return in;
|
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// ar ai br bi -> -ai ar -bi br
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float32x4_t r0, r1;
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r0 = vnegq_f32(in); // -ar -ai -br -bi
|
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r1 = vrev64q_f32(r0); // -ai -ar -bi -br
|
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return vtrn1q_f32(r1, in); // -ai ar -bi br
|
||||
}
|
||||
//Complex double
|
||||
//inline float32x4_t operator()(float32x4_t in, float32x4_t ret){
|
||||
// return 0;
|
||||
//}
|
||||
inline float64x2_t operator()(float64x2_t in, float64x2_t ret){
|
||||
// a ib -> -b ia
|
||||
float64x2_t tmp;
|
||||
tmp = vnegq_f64(in);
|
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return vextq_f64(tmp, in, 1);
|
||||
}
|
||||
};
|
||||
|
||||
struct Permute{
|
||||
|
||||
static inline float32x4_t Permute0(float32x4_t in){ // N:ok
|
||||
// AB CD -> CD AB
|
||||
return vextq_f32(in, in, 2);
|
||||
};
|
||||
static inline float32x4_t Permute1(float32x4_t in){ // N:ok
|
||||
// AB CD -> BA DC
|
||||
return vrev64q_f32(in);
|
||||
};
|
||||
static inline float32x4_t Permute2(float32x4_t in){ // N:not used by Boyle
|
||||
return in;
|
||||
};
|
||||
static inline float32x4_t Permute3(float32x4_t in){ // N:not used by Boyle
|
||||
return in;
|
||||
};
|
||||
|
||||
static inline float64x2_t Permute0(float64x2_t in){ // N:ok
|
||||
// AB -> BA
|
||||
return vextq_f64(in, in, 1);
|
||||
};
|
||||
static inline float64x2_t Permute1(float64x2_t in){ // N:not used by Boyle
|
||||
return in;
|
||||
};
|
||||
static inline float64x2_t Permute2(float64x2_t in){ // N:not used by Boyle
|
||||
return in;
|
||||
};
|
||||
static inline float64x2_t Permute3(float64x2_t in){ // N:not used by Boyle
|
||||
return in;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
struct Rotate{
|
||||
|
||||
static inline float32x4_t rotate(float32x4_t in,int n){ // N:ok
|
||||
switch(n){
|
||||
case 0: // AB CD -> AB CD
|
||||
return tRotate<0>(in);
|
||||
break;
|
||||
case 1: // AB CD -> BC DA
|
||||
return tRotate<1>(in);
|
||||
break;
|
||||
case 2: // AB CD -> CD AB
|
||||
return tRotate<2>(in);
|
||||
break;
|
||||
case 3: // AB CD -> DA BC
|
||||
return tRotate<3>(in);
|
||||
break;
|
||||
default: assert(0);
|
||||
}
|
||||
}
|
||||
static inline float64x2_t rotate(float64x2_t in,int n){ // N:ok
|
||||
switch(n){
|
||||
case 0: // AB -> AB
|
||||
return tRotate<0>(in);
|
||||
break;
|
||||
case 1: // AB -> BA
|
||||
return tRotate<1>(in);
|
||||
break;
|
||||
default: assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
// working, but no restriction on n
|
||||
// template<int n> static inline float32x4_t tRotate(float32x4_t in){ return vextq_f32(in,in,n); };
|
||||
// template<int n> static inline float64x2_t tRotate(float64x2_t in){ return vextq_f64(in,in,n); };
|
||||
|
||||
// restriction on n
|
||||
template<int n> static inline float32x4_t tRotate(float32x4_t in){ return vextq_f32(in,in,n%4); };
|
||||
template<int n> static inline float64x2_t tRotate(float64x2_t in){ return vextq_f64(in,in,n%2); };
|
||||
|
||||
};
|
||||
|
||||
struct PrecisionChange {
|
||||
|
||||
static inline float16x8_t StoH (const float32x4_t &a,const float32x4_t &b) {
|
||||
float16x4_t h = vcvt_f16_f32(a);
|
||||
return vcvt_high_f16_f32(h, b);
|
||||
}
|
||||
static inline void HtoS (float16x8_t h,float32x4_t &sa,float32x4_t &sb) {
|
||||
sb = vcvt_high_f32_f16(h);
|
||||
// there is no direct conversion from lower float32x4_t to float64x2_t
|
||||
// vextq_f16 not supported by clang 3.8 / 4.0 / arm clang
|
||||
//float16x8_t h1 = vextq_f16(h, h, 4); // correct, but not supported by clang
|
||||
// workaround for clang
|
||||
uint32x4_t h1u = reinterpret_cast<uint32x4_t>(h);
|
||||
float16x8_t h1 = reinterpret_cast<float16x8_t>(vextq_u32(h1u, h1u, 2));
|
||||
sa = vcvt_high_f32_f16(h1);
|
||||
}
|
||||
static inline float32x4_t DtoS (float64x2_t a,float64x2_t b) {
|
||||
float32x2_t s = vcvt_f32_f64(a);
|
||||
return vcvt_high_f32_f64(s, b);
|
||||
|
||||
}
|
||||
static inline void StoD (float32x4_t s,float64x2_t &a,float64x2_t &b) {
|
||||
b = vcvt_high_f64_f32(s);
|
||||
// there is no direct conversion from lower float32x4_t to float64x2_t
|
||||
float32x4_t s1 = vextq_f32(s, s, 2);
|
||||
a = vcvt_high_f64_f32(s1);
|
||||
|
||||
}
|
||||
static inline float16x8_t DtoH (float64x2_t a,float64x2_t b,float64x2_t c,float64x2_t d) {
|
||||
float32x4_t s1 = DtoS(a, b);
|
||||
float32x4_t s2 = DtoS(c, d);
|
||||
return StoH(s1, s2);
|
||||
}
|
||||
static inline void HtoD (float16x8_t h,float64x2_t &a,float64x2_t &b,float64x2_t &c,float64x2_t &d) {
|
||||
float32x4_t s1, s2;
|
||||
HtoS(h, s1, s2);
|
||||
StoD(s1, a, b);
|
||||
StoD(s2, c, d);
|
||||
}
|
||||
};
|
||||
|
||||
//////////////////////////////////////////////
|
||||
// Exchange support
|
||||
|
||||
struct Exchange{
|
||||
static inline void Exchange0(float32x4_t &out1,float32x4_t &out2,float32x4_t in1,float32x4_t in2){
|
||||
// in1: ABCD -> out1: ABEF
|
||||
// in2: EFGH -> out2: CDGH
|
||||
|
||||
// z: CDAB
|
||||
float32x4_t z = vextq_f32(in1, in1, 2);
|
||||
// out1: ABEF
|
||||
out1 = vextq_f32(z, in2, 2);
|
||||
|
||||
// z: GHEF
|
||||
z = vextq_f32(in2, in2, 2);
|
||||
// out2: CDGH
|
||||
out2 = vextq_f32(in1, z, 2);
|
||||
};
|
||||
|
||||
static inline void Exchange1(float32x4_t &out1,float32x4_t &out2,float32x4_t in1,float32x4_t in2){
|
||||
// in1: ABCD -> out1: AECG
|
||||
// in2: EFGH -> out2: BFDH
|
||||
out1 = vtrn1q_f32(in1, in2);
|
||||
out2 = vtrn2q_f32(in1, in2);
|
||||
};
|
||||
static inline void Exchange2(float32x4_t &out1,float32x4_t &out2,float32x4_t in1,float32x4_t in2){
|
||||
assert(0);
|
||||
return;
|
||||
};
|
||||
static inline void Exchange3(float32x4_t &out1,float32x4_t &out2,float32x4_t in1,float32x4_t in2){
|
||||
assert(0);
|
||||
return;
|
||||
};
|
||||
// double precision
|
||||
static inline void Exchange0(float64x2_t &out1,float64x2_t &out2,float64x2_t in1,float64x2_t in2){
|
||||
// in1: AB -> out1: AC
|
||||
// in2: CD -> out2: BD
|
||||
out1 = vzip1q_f64(in1, in2);
|
||||
out2 = vzip2q_f64(in1, in2);
|
||||
};
|
||||
static inline void Exchange1(float64x2_t &out1,float64x2_t &out2,float64x2_t in1,float64x2_t in2){
|
||||
assert(0);
|
||||
return;
|
||||
};
|
||||
static inline void Exchange2(float64x2_t &out1,float64x2_t &out2,float64x2_t in1,float64x2_t in2){
|
||||
assert(0);
|
||||
return;
|
||||
};
|
||||
static inline void Exchange3(float64x2_t &out1,float64x2_t &out2,float64x2_t in1,float64x2_t in2){
|
||||
assert(0);
|
||||
return;
|
||||
};
|
||||
};
|
||||
|
||||
//////////////////////////////////////////////
|
||||
// Some Template specialization
|
||||
template < typename vtype >
|
||||
void permute(vtype &a, vtype b, int perm) {
|
||||
|
||||
};
|
||||
|
||||
//Complex float Reduce
|
||||
template<>
|
||||
inline Grid::ComplexF Reduce<Grid::ComplexF, float32x4_t>::operator()(float32x4_t in){
|
||||
return 0;
|
||||
float32x4_t v1; // two complex
|
||||
v1 = Optimization::Permute::Permute0(in);
|
||||
v1 = vaddq_f32(v1,in);
|
||||
u128f conv; conv.v=v1;
|
||||
return Grid::ComplexF(conv.f[0],conv.f[1]);
|
||||
}
|
||||
//Real float Reduce
|
||||
template<>
|
||||
inline Grid::RealF Reduce<Grid::RealF, float32x4_t>::operator()(float32x4_t in){
|
||||
float32x2_t high = vget_high_f32(in);
|
||||
float32x2_t low = vget_low_f32(in);
|
||||
float32x2_t tmp = vadd_f32(low, high);
|
||||
float32x2_t sum = vpadd_f32(tmp, tmp);
|
||||
return vget_lane_f32(sum,0);
|
||||
return vaddvq_f32(in);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
//Complex double Reduce
|
||||
template<>
|
||||
template<> // N:by Boyle
|
||||
inline Grid::ComplexD Reduce<Grid::ComplexD, float64x2_t>::operator()(float64x2_t in){
|
||||
return 0;
|
||||
u128d conv; conv.v = in;
|
||||
return Grid::ComplexD(conv.f[0],conv.f[1]);
|
||||
}
|
||||
|
||||
|
||||
//Real double Reduce
|
||||
template<>
|
||||
inline Grid::RealD Reduce<Grid::RealD, float64x2_t>::operator()(float64x2_t in){
|
||||
float64x2_t sum = vpaddq_f64(in, in);
|
||||
return vgetq_lane_f64(sum,0);
|
||||
return vaddvq_f64(in);
|
||||
}
|
||||
|
||||
//Integer Reduce
|
||||
template<>
|
||||
inline Integer Reduce<Integer, uint32x4_t>::operator()(uint32x4_t in){
|
||||
// FIXME unimplemented
|
||||
printf("Reduce : Missing integer implementation -> FIX\n");
|
||||
printf("Reduce : Missing integer implementation -> FIX\n");
|
||||
assert(0);
|
||||
}
|
||||
}
|
||||
|
||||
//////////////////////////////////////////////////////////////////////////////////////
|
||||
// Here assign types
|
||||
namespace Grid {
|
||||
// Here assign types
|
||||
|
||||
// typedef Optimization::vech SIMD_Htype; // Reduced precision type
|
||||
typedef float16x8_t SIMD_Htype; // Half precision type
|
||||
typedef float32x4_t SIMD_Ftype; // Single precision type
|
||||
typedef float64x2_t SIMD_Dtype; // Double precision type
|
||||
typedef uint32x4_t SIMD_Itype; // Integer type
|
||||
@ -312,13 +584,6 @@ namespace Grid {
|
||||
inline void prefetch_HINT_T0(const char *ptr){};
|
||||
|
||||
|
||||
// Gpermute function
|
||||
template < typename VectorSIMD >
|
||||
inline void Gpermute(VectorSIMD &y,const VectorSIMD &b, int perm ) {
|
||||
Optimization::permute(y.v,b.v,perm);
|
||||
}
|
||||
|
||||
|
||||
// Function name aliases
|
||||
typedef Optimization::Vsplat VsplatSIMD;
|
||||
typedef Optimization::Vstore VstoreSIMD;
|
||||
@ -326,16 +591,21 @@ namespace Grid {
|
||||
typedef Optimization::Vstream VstreamSIMD;
|
||||
template <typename S, typename T> using ReduceSIMD = Optimization::Reduce<S,T>;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// Arithmetic operations
|
||||
typedef Optimization::Sum SumSIMD;
|
||||
typedef Optimization::Sub SubSIMD;
|
||||
typedef Optimization::Div DivSIMD;
|
||||
typedef Optimization::Mult MultSIMD;
|
||||
typedef Optimization::MultComplex MultComplexSIMD;
|
||||
typedef Optimization::MultRealPart MultRealPartSIMD;
|
||||
typedef Optimization::MaddRealPart MaddRealPartSIMD;
|
||||
typedef Optimization::Conj ConjSIMD;
|
||||
typedef Optimization::TimesMinusI TimesMinusISIMD;
|
||||
typedef Optimization::TimesI TimesISIMD;
|
||||
|
||||
}
|
||||
|
||||
//#endif // ARM_NEON
|
||||
|
||||
Loading…
Reference in New Issue
Block a user