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Merge branch 'develop' of https://github.com/paboyle/Grid into feature/hadrons
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7d2d5e8d3d
@ -701,9 +701,28 @@ namespace Optimization {
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, __m256i>::operator()(__m256i in){
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// FIXME unimplemented
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printf("Reduce : Missing integer implementation -> FIX\n");
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assert(0);
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__m128i ret;
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#if defined (AVX2)
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// AVX2 horizontal adds within upper and lower halves of register; use
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// SSE to add upper and lower halves for result.
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__m256i v1, v2;
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__m128i u1, u2;
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v1 = _mm256_hadd_epi32(in, in);
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v2 = _mm256_hadd_epi32(v1, v1);
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u1 = _mm256_castsi256_si128(v2); // upper half
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u2 = _mm256_extracti128_si256(v2, 1); // lower half
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ret = _mm_add_epi32(u1, u2);
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#else
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// No AVX horizontal add; extract upper and lower halves of register & use
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// SSE intrinsics.
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__m128i u1, u2, u3;
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u1 = _mm256_extractf128_si256(in, 0); // upper half
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u2 = _mm256_extractf128_si256(in, 1); // lower half
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u3 = _mm_add_epi32(u1, u2);
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u1 = _mm_hadd_epi32(u3, u3);
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ret = _mm_hadd_epi32(u1, u1);
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#endif
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return _mm_cvtsi128_si32(ret);
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}
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}
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@ -543,6 +543,24 @@ namespace Optimization {
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u512d conv; conv.v = v1;
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return conv.f[0];
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}
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, __m512i>::operator()(__m512i in){
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// No full vector reduce, use AVX to add upper and lower halves of register
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// and perform AVX reduction.
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__m256i v1, v2, v3;
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__m128i u1, u2, ret;
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v1 = _mm512_castsi512_si256(in); // upper half
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v2 = _mm512_extracti32x8_epi32(in, 1); // lower half
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v3 = _mm256_add_epi32(v1, v2);
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v1 = _mm256_hadd_epi32(v3, v3);
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v2 = _mm256_hadd_epi32(v1, v1);
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u1 = _mm256_castsi256_si128(v2) // upper half
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u2 = _mm256_extracti128_si256(v2, 1); // lower half
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ret = _mm_add_epi32(u1, u2);
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return _mm_cvtsi128_si32(ret);
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}
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#else
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//Complex float Reduce
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template<>
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@ -570,9 +588,7 @@ namespace Optimization {
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, __m512i>::operator()(__m512i in){
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// FIXME unimplemented
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printf("Reduce : Missing integer implementation -> FIX\n");
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assert(0);
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return _mm512_reduce_add_epi32(in);
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}
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#endif
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@ -401,9 +401,7 @@ namespace Optimization {
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, __m512i>::operator()(__m512i in){
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// FIXME unimplemented
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printf("Reduce : Missing integer implementation -> FIX\n");
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assert(0);
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return _mm512_reduce_add_epi32(in);
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}
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@ -374,6 +374,84 @@ namespace Optimization {
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// Complex float
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FLOAT_WRAP_2(operator(), inline)
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};
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#define USE_FP16
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struct PrecisionChange {
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static inline vech StoH (const vector4float &a, const vector4float &b) {
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vech ret;
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std::cout << GridLogError << "QPX single to half precision conversion not yet supported." << std::endl;
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assert(0);
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return ret;
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}
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static inline void HtoS (vech h, vector4float &sa, vector4float &sb) {
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std::cout << GridLogError << "QPX half to single precision conversion not yet supported." << std::endl;
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assert(0);
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}
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static inline vector4float DtoS (vector4double a, vector4double b) {
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vector4float ret;
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std::cout << GridLogError << "QPX double to single precision conversion not yet supported." << std::endl;
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assert(0);
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return ret;
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}
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static inline void StoD (vector4float s, vector4double &a, vector4double &b) {
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std::cout << GridLogError << "QPX single to double precision conversion not yet supported." << std::endl;
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assert(0);
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}
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static inline vech DtoH (vector4double a, vector4double b,
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vector4double c, vector4double d) {
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vech ret;
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std::cout << GridLogError << "QPX double to half precision conversion not yet supported." << std::endl;
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assert(0);
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return ret;
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}
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static inline void HtoD (vech h, vector4double &a, vector4double &b,
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vector4double &c, vector4double &d) {
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std::cout << GridLogError << "QPX half to double precision conversion not yet supported." << std::endl;
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assert(0);
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}
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};
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//////////////////////////////////////////////
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// Exchange support
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#define FLOAT_WRAP_EXCHANGE(fn) \
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static inline void fn(vector4float &out1, vector4float &out2, \
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vector4float in1, vector4float in2) \
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{ \
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vector4double out1d, out2d, in1d, in2d; \
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in1d = Vset()(in1); \
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in2d = Vset()(in2); \
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fn(out1d, out2d, in1d, in2d); \
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Vstore()(out1d, out1); \
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Vstore()(out2d, out2); \
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}
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struct Exchange{
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// double precision
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static inline void Exchange0(vector4double &out1, vector4double &out2,
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vector4double in1, vector4double in2) {
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out1 = vec_perm(in1, in2, vec_gpci(0145));
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out2 = vec_perm(in1, in2, vec_gpci(02367));
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}
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static inline void Exchange1(vector4double &out1, vector4double &out2,
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vector4double in1, vector4double in2) {
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out1 = vec_perm(in1, in2, vec_gpci(0426));
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out2 = vec_perm(in1, in2, vec_gpci(01537));
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}
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static inline void Exchange2(vector4double &out1, vector4double &out2,
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vector4double in1, vector4double in2) {
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assert(0);
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}
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static inline void Exchange3(vector4double &out1, vector4double &out2,
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vector4double in1, vector4double in2) {
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assert(0);
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}
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// single precision
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FLOAT_WRAP_EXCHANGE(Exchange0);
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FLOAT_WRAP_EXCHANGE(Exchange1);
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FLOAT_WRAP_EXCHANGE(Exchange2);
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FLOAT_WRAP_EXCHANGE(Exchange3);
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};
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struct Permute{
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//Complex double
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@ -497,15 +575,19 @@ namespace Optimization {
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, int>::operator()(int in){
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// FIXME unimplemented
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printf("Reduce : Missing integer implementation -> FIX\n");
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assert(0);
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inline Integer Reduce<Integer, veci>::operator()(veci in){
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Integer a = 0;
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for (unsigned int i = 0; i < W<Integer>::r; ++i)
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{
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a += in.v[i];
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}
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return a;
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}
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}
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////////////////////////////////////////////////////////////////////////////////
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// Here assign types
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typedef Optimization::vech SIMD_Htype; // Half precision type
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typedef Optimization::vector4float SIMD_Ftype; // Single precision type
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typedef vector4double SIMD_Dtype; // Double precision type
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typedef Optimization::veci SIMD_Itype; // Integer type
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@ -570,9 +570,9 @@ namespace Optimization {
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//Integer Reduce
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template<>
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inline Integer Reduce<Integer, __m128i>::operator()(__m128i in){
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// FIXME unimplemented
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printf("Reduce : Missing integer implementation -> FIX\n");
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assert(0);
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__m128i v1 = _mm_hadd_epi32(in, in);
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__m128i v2 = _mm_hadd_epi32(v1, v1);
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return _mm_cvtsi128_si32(v2);
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}
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}
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@ -183,8 +183,6 @@ void IntTester(const functor &func)
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{
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typedef Integer scal;
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typedef vInteger vec;
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GridSerialRNG sRNG;
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sRNG.SeedFixedIntegers(std::vector<int>({45,12,81,9}));
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int Nsimd = vec::Nsimd();
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@ -287,6 +285,50 @@ void ReductionTester(const functor &func)
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}
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template<class reduced,class scal, class vec,class functor >
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void IntReductionTester(const functor &func)
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{
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int Nsimd = vec::Nsimd();
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std::vector<scal> input1(Nsimd);
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std::vector<scal> input2(Nsimd);
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reduced result(0);
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reduced reference(0);
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reduced tmp;
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std::vector<vec,alignedAllocator<vec> > buf(3);
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vec & v_input1 = buf[0];
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vec & v_input2 = buf[1];
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for(int i=0;i<Nsimd;i++){
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input1[i] = (i + 1) * 30;
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input2[i] = (i + 1) * 20;
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}
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merge<vec,scal>(v_input1,input1);
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merge<vec,scal>(v_input2,input2);
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func.template vfunc<reduced,vec>(result,v_input1,v_input2);
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for(int i=0;i<Nsimd;i++) {
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func.template sfunc<reduced,scal>(tmp,input1[i],input2[i]);
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reference+=tmp;
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}
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std::cout<<GridLogMessage << " " << func.name()<<std::endl;
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int ok=0;
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if ( reference-result != 0 ){
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std::cout<<GridLogMessage<< "*****" << std::endl;
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std::cout<<GridLogMessage<< reference-result << " " <<reference<< " " << result<<std::endl;
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ok++;
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}
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if ( ok==0 ) {
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std::cout<<GridLogMessage << " OK!" <<std::endl;
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}
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assert(ok==0);
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}
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class funcPermute {
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public:
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@ -691,6 +733,7 @@ int main (int argc, char ** argv)
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IntTester(funcPlus());
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IntTester(funcMinus());
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IntTester(funcTimes());
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IntReductionTester<Integer, Integer, vInteger>(funcReduce());
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std::cout<<GridLogMessage << "==================================="<< std::endl;
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std::cout<<GridLogMessage << "Testing precisionChange "<< std::endl;
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