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AVX512 only for ASM compilation
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@ -192,9 +192,11 @@ void StaggeredKernels<Impl>::DhopSiteDag(StencilImpl &st, LebesgueOrder &lo, Dou
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int oneLink =0;
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int threeLink=1;
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switch(Opt) {
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#ifdef AVX512
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case OptInlineAsm:
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DhopSiteAsm(st,lo,U,UUU,buf,sF,sU,in,out._odata[sF]);
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break;
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#endif
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case OptHandUnroll:
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DhopSiteDepthHand(st,lo,U,buf,sF,sU,in,naive,oneLink);
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DhopSiteDepthHand(st,lo,UUU,buf,sF,sU,in,naik,threeLink);
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@ -220,9 +222,11 @@ void StaggeredKernels<Impl>::DhopSite(StencilImpl &st, LebesgueOrder &lo, Double
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SiteSpinor naive;
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static int once;
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switch(Opt) {
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#ifdef AVX512
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case OptInlineAsm:
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DhopSiteAsm(st,lo,U,UUU,buf,sF,sU,in,out._odata[sF]);
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break;
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#endif
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case OptHandUnroll:
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DhopSiteDepthHand(st,lo,U,buf,sF,sU,in,naive,oneLink);
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DhopSiteDepthHand(st,lo,UUU,buf,sF,sU,in,naik,threeLink);
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@ -257,6 +257,7 @@ void StaggeredKernels<Impl>::DhopSiteAsm(StencilImpl &st, LebesgueOrder &lo,
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SiteSpinor *buf, int sF,
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int sU, const FermionField &in, SiteSpinor &out)
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{
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#ifdef AVX512
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uint64_t gauge0,gauge1,gauge2,gauge3;
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uint64_t addr0,addr1,addr2,addr3;
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@ -318,6 +319,9 @@ void StaggeredKernels<Impl>::DhopSiteAsm(StencilImpl &st, LebesgueOrder &lo,
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addr0 = (uint64_t) &out;
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REDUCE(addr0);
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#else
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assert(0);
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#endif
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}
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FermOpStaggeredTemplateInstantiate(StaggeredKernels);
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