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Much bigger pointer cache in case of Nvidia due to cost of setting up UVM allocations
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@ -6,6 +6,12 @@ NAMESPACE_BEGIN(Grid);
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MemoryStats *MemoryProfiler::stats = nullptr;
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bool MemoryProfiler::debug = false;
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#ifdef GRID_NVCC
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#define SMALL_LIMIT (0)
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#else
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#define SMALL_LIMIT (4096)
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#endif
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#ifdef POINTER_CACHE
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int PointerCache::victim;
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@ -13,7 +19,7 @@ PointerCache::PointerCacheEntry PointerCache::Entries[PointerCache::Ncache];
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void *PointerCache::Insert(void *ptr,size_t bytes) {
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if (bytes < 4096 ) return ptr;
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if (bytes < SMALL_LIMIT ) return ptr;
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#ifdef GRID_OMP
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assert(omp_in_parallel()==0);
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@ -50,7 +56,7 @@ void *PointerCache::Insert(void *ptr,size_t bytes) {
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void *PointerCache::Lookup(size_t bytes) {
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if (bytes < 4096 ) return NULL;
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if (bytes < SMALL_LIMIT ) return NULL;
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#ifdef GRID_OMP
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assert(omp_in_parallel()==0);
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@ -49,8 +49,13 @@ NAMESPACE_BEGIN(Grid);
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#ifdef POINTER_CACHE
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class PointerCache {
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private:
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/*Pinning pages is costly*/
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/*Could maintain separate large and small allocation caches*/
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#ifdef GRID_NVCC
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static const int Ncache=128;
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#else
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static const int Ncache=8;
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#endif
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static int victim;
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typedef struct {
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@ -63,7 +68,6 @@ private:
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public:
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static void *Insert(void *ptr,size_t bytes) ;
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static void *Lookup(size_t bytes) ;
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@ -170,13 +174,14 @@ public:
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// Unified (managed) memory
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////////////////////////////////////
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if ( ptr == (_Tp *) NULL ) {
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// printf(" alignedAllocater cache miss %ld bytes ",bytes); BACKTRACEFP(stdout);
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auto err = cudaMallocManaged((void **)&ptr,bytes);
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if( err != cudaSuccess ) {
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ptr = (_Tp *) NULL;
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std::cerr << " cudaMallocManaged failed for " << bytes<<" bytes " <<cudaGetErrorString(err)<< std::endl;
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assert(0);
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}
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}
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}
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assert( ptr != (_Tp *)NULL);
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#else
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//////////////////////////////////////////////////////////////////////////////////////////
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