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mirror of https://github.com/paboyle/Grid.git synced 2024-11-09 23:45:36 +00:00

Optional support for faster CRC32C checksum through Intel IPP

This commit is contained in:
Antonin Portelli 2018-11-19 17:21:53 +00:00
parent 494b3c9e57
commit d77bc88170
3 changed files with 45 additions and 3 deletions

View File

@ -28,17 +28,31 @@
extern "C" {
#include <openssl/sha.h>
}
#ifdef USE_IPP
#include "ipp.h"
#endif
#pragma once
class GridChecksum
{
public:
static inline uint32_t crc32(const void *data,size_t bytes)
static inline uint32_t crc32(const void *data, size_t bytes)
{
return ::crc32(0L,(unsigned char *)data,bytes);
}
#ifdef USE_IPP
static inline uint32_t crc32c(const void* data, size_t bytes)
{
uint32_t crc32c = ~(uint32_t)0;
ippsCRC32C_8u(reinterpret_cast<const unsigned char *>(data), bytes, &crc32c);
ippsSwapBytes_32u_I(&crc32c, 1);
return ~crc32c;
}
#endif
template <typename T>
static inline std::string sha256_string(const std::vector<T> &hash)
{

View File

@ -176,7 +176,11 @@ private:
f.read(reinterpret_cast<char *>(obj.data()), matSize);
tRead += usecond();
tHash = -usecond();
#ifdef USE_IPP
check = GridChecksum::crc32c(obj.data(), matSize);
#else
check = GridChecksum::crc32(obj.data(), matSize);
#endif
tHash += usecond();
DV_DEBUG_MSG(this, "Eigen read " << tRead/1.0e6 << " sec " << matSize/tRead*1.0e6/1024/1024 << " MB/s");
DV_DEBUG_MSG(this, "Eigen crc32 " << std::hex << check << std::dec
@ -199,7 +203,11 @@ private:
nCol = obj.cols();
matSize = nRow*nCol*sizeof(T);
tHash = -usecond();
#ifdef USE_IPP
crc = GridChecksum::crc32c(obj.data(), matSize);
#else
crc = GridChecksum::crc32(obj.data(), matSize);
#endif
tHash += usecond();
f.write(reinterpret_cast<char *>(&crc), sizeof(crc));
f.write(reinterpret_cast<char *>(&nRow), sizeof(nRow));

View File

@ -123,10 +123,13 @@ case ${ac_SFW_FP16} in
AC_MSG_ERROR(["SFW FP16 option not supported ${ac_SFW_FP16}"]);;
esac
############### MKL
############### Intel libraries
AC_ARG_ENABLE([mkl],
[AC_HELP_STRING([--enable-mkl=yes|no|prefix], [enable Intel MKL for LAPACK & FFTW])],
[ac_MKL=${enable_mkl}], [ac_MKL=no])
AC_ARG_ENABLE([ipp],
[AC_HELP_STRING([--enable-ipp=yes|no|prefix], [enable Intel IPP for fast CRC32C])],
[ac_IPP=${enable_mkl}], [ac_IPP=no])
case ${ac_MKL} in
no)
@ -139,6 +142,17 @@ case ${ac_MKL} in
AC_DEFINE([USE_MKL], [1], [Define to 1 if you use the Intel MKL]);;
esac
case ${ac_IPP} in
no)
;;
yes)
AC_DEFINE([USE_IPP], [1], [Define to 1 if you use the Intel IPP]);;
*)
AM_CXXFLAGS="-I$ac_IPP/include $AM_CXXFLAGS"
AM_LDFLAGS="-L$ac_IPP/lib $AM_LDFLAGS"
AC_DEFINE([USE_IPP], [1], [Define to 1 if you use the Intel IPP]);;
esac
############### HDF5
AC_ARG_WITH([hdf5],
[AS_HELP_STRING([--with-hdf5=prefix],
@ -170,7 +184,13 @@ AC_CHECK_FUNCS([gettimeofday])
if test "${ac_MKL}x" != "nox"; then
AC_SEARCH_LIBS([mkl_set_interface_layer], [mkl_rt], [],
[AC_MSG_ERROR("MKL enabled but library not found")])
[AC_MSG_ERROR("Intel MKL enabled but library not found")])
fi
if test "${ac_IPP}x" != "nox"; then
AC_SEARCH_LIBS([ippsCRC32C_8u], [ippdc],
[LIBS="${LIBS} -lippdc -lippvm -lipps -lippcore"],
[AC_MSG_ERROR("Intel IPP enabled but library not found")])
fi
AC_SEARCH_LIBS([__gmpf_init], [gmp],