nmeyer-ur
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d9474c6cb6
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compiler-independent build using --enable-simd=A64FX
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2020-07-09 10:07:02 +02:00 |
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nmeyer-ur
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bbd145382b
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enable --enable-simd=A64FX in configure
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2020-07-08 12:43:51 +02:00 |
|
nmeyer-ur
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8726e94ea7
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merge upstream develop
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2020-07-07 20:26:47 +02:00 |
|
nmeyer-ur
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a25e4b3d0c
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pred 32/64 for float/double instead of 8 in VLA patch
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2020-06-13 14:44:37 +02:00 |
|
nmeyer-ur
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d1210ca12a
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switch to double/float instead of float64_t/float32_t in VLA patch
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2020-06-13 13:59:32 +02:00 |
|
nmeyer-ur
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36ea0e222a
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type traits for ComplexF/D in VLA patch; cosmetics in VLS intrinsics
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2020-06-13 13:42:35 +02:00 |
|
nmeyer-ur
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92281ec22d
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add 3 op Mult for VLA
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2020-06-12 18:49:05 +02:00 |
|
nmeyer-ur
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87266ce099
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comment out fcmla in vector types: need also MultAddReal
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2020-06-12 18:37:19 +02:00 |
|
nmeyer-ur
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2a23f133e8
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reenable fcmla for VLA
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2020-06-12 17:30:38 +02:00 |
|
nmeyer-ur
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8dbf790f62
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correct tbl2 for sp
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2020-06-12 17:12:34 +02:00 |
|
nmeyer-ur
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2402b4940e
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vec_imm in float
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2020-06-12 15:17:38 +02:00 |
|
nmeyer-ur
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2111052fbe
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apply VLA patch for memcpy reduction suggested by Arm, CAS-162542-D6W7Z7
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2020-06-12 14:49:19 +02:00 |
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nmeyer-ur
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433766ac62
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revert Add/SubTimesI and prefetching in stencil
This reverts commit 9b2699226c.
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2020-06-08 12:02:53 +02:00 |
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nmeyer-ur
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9872c76825
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introduce AddTimesI and SubTimesI; slight benefit in operators, but < 1%; breaks all other impls
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2020-06-03 15:20:13 +02:00 |
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nmeyer-ur
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5ee3ea2144
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round-up after testing of prefetches in stencil close
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2020-06-03 11:58:20 +02:00 |
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nmeyer-ur
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5050833b42
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revert changes due to performance penalty in Wilson using MPI
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2020-06-02 13:08:57 +02:00 |
|
nmeyer-ur
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7bee4ebb54
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correct predication for svcadd
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2020-06-02 10:51:39 +02:00 |
|
nmeyer-ur
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71cf9851e7
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correct type for vecd in TimesI and TimesMinusI
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2020-06-02 10:44:15 +02:00 |
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nmeyer-ur
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b4735c9904
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correct zero in svcadd
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2020-06-02 10:38:05 +02:00 |
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nmeyer-ur
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9b2699226c
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use fcadd in TimesI and TimesMinusI instead of tbl and neg
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2020-06-02 10:32:44 +02:00 |
|
Peter Boyle
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556da86ac3
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HIP fp16
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2020-05-24 13:41:58 -04:00 |
|
nmeyer-ur
|
6ddcef1bca
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fix build error enabling fcmla/mac in vector types for VLA
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2020-05-21 21:21:03 +02:00 |
|
nmeyer-ur
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8c5a5fdfce
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disable fcmla in vector type building for VLA
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2020-05-21 19:41:42 +02:00 |
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nmeyer-ur
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046b1cbbc0
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enable fcmla in tensor arithmetics; fixed-size works, VLA does not compile
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2020-05-21 19:39:07 +02:00 |
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nmeyer-ur
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a65ce237c1
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clean up; Exch1 VLA sp+dp integrate, tested, working
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2020-05-21 09:48:06 +02:00 |
|
nmeyer-ur
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cd27f1005d
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clean up; Exch1 sp integrate, tested, working
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2020-05-21 08:45:43 +02:00 |
|
nmeyer-ur
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f8c0a59221
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clean up; Exch1 dp integrate, tested, working
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2020-05-21 02:48:14 +02:00 |
|
nmeyer-ur
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832485699f
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save some cycles in HtoD and DtoH by direct instead of multi-pass conversion
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2020-05-20 23:04:35 +02:00 |
|
nmeyer-ur
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81484a4760
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symmetrize Mult and MultAddComplex
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2020-05-20 22:36:45 +02:00 |
|
nmeyer-ur
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9a86059761
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symmetrize VLA and fixed size build messages
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2020-05-20 20:05:42 +02:00 |
|
nmeyer-ur
|
9e085bd04e
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guard prevents multiple A64FX build messages
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2020-05-20 19:16:30 +02:00 |
|
nmeyer-ur
|
6b6bf537d3
|
comment out mac in vector types
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2020-05-18 20:36:16 +02:00 |
|
nmeyer-ur
|
323a651c71
|
correct typo
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2020-05-18 19:58:27 +02:00 |
|
nmeyer-ur
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9f212679f1
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support fcmla in vector_types, untested
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2020-05-18 19:55:18 +02:00 |
|
nmeyer-ur
|
032f7dde1a
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update SVE readme, asm generator
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2020-05-18 19:10:36 +02:00 |
|
nmeyer-ur
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50b1db1e8b
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implemented correct _m form (using 3 operands instead of 2)
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2020-05-15 10:01:05 +02:00 |
|
nmeyer-ur
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10a34312dc
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some fixed-size code clean up
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2020-05-14 23:20:16 +02:00 |
|
nmeyer-ur
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db8c0e7584
|
replaced _x form with _m form when using even/odd predication
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2020-05-14 23:17:35 +02:00 |
|
nmeyer-ur
|
d15ccad8a7
|
switched to vec* in Reduce
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2020-05-12 20:41:14 +02:00 |
|
nmeyer-ur
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b7c76ede29
|
Removed some assertions in Test_simd and removed exit() in Reduce
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2020-05-11 22:43:00 +02:00 |
|
nmeyer-ur
|
05edf803bd
|
corrected typo
|
2020-05-12 03:59:59 +09:00 |
|
nmeyer-ur
|
78b8e40f83
|
switched to gcc's internal data types
|
2020-05-11 18:11:23 +02:00 |
|
Peter Boyle
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bbbee5660d
|
First compiile on HiP
|
2020-05-10 05:28:09 -04:00 |
|
nmeyer-ur
|
b2fd8b993a
|
fixed-size clean up
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2020-05-09 22:53:42 +02:00 |
|
nmeyer-ur
|
291ee8c3d0
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updated fixed-size implementation; only Exch1 and prefetches missing
|
2020-05-09 22:18:02 +02:00 |
|
nmeyer-ur
|
e1a5b3ea49
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unions for tables eliminate explicit loads, gcc does not complain
|
2020-05-09 21:21:57 +02:00 |
|
nmeyer-ur
|
55a55660cb
|
reverted changes
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2020-05-09 12:48:42 +02:00 |
|
nmeyer-ur
|
ceb8b374da
|
API change v3
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2020-05-08 15:04:44 +02:00 |
|
nmeyer-ur
|
4bc2ad2894
|
API change v2
|
2020-05-08 15:00:25 +02:00 |
|
nmeyer-ur
|
798af3e68f
|
retry changing StoD API
|
2020-05-08 14:34:59 +02:00 |
|