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19b527e83f
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Better extract merge for GPU. Let the SIMD header files define the pointer type for
access. GPU redirects through builtin float2, double2 for complex
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2018-07-05 07:05:13 -04:00 |
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4730d4692a
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Fast lane extract, saturates bandwidth on Volta for SU3 benchmarks
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2018-07-05 07:03:33 -04:00 |
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1bb456c0c5
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Minor GPU vector width changeÂ
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2018-07-05 07:02:04 -04:00 |
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3a50afe7e7
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GPU dslash updates
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2018-06-27 22:32:21 +01:00 |
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f8e880b445
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Loop for s and xyzt offlow
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2018-06-27 21:49:57 +01:00 |
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3e947527cb
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Move looping over "s" and "site" into kernels for GPU optimisatoin
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2018-06-27 21:29:43 +01:00 |
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31f65beac8
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Move site and Ls looping into the kernels
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2018-06-27 21:28:48 +01:00 |
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38e2a32ac9
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Single SIMD lane operations for CUDA
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2018-06-27 21:28:06 +01:00 |
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efa84ca50a
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Keep Cuda 9.1 happy
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2018-06-27 21:27:32 +01:00 |
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5e96d6d04c
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Keep CUDA happy
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2018-06-27 21:27:11 +01:00 |
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df30bdc599
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CUDA happy
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2018-06-27 21:26:49 +01:00 |
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7f45222924
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Diagnostics on memory alloc fail
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2018-06-27 21:26:20 +01:00 |
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dd891f5e3b
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Use NVCC to suppress device Eigen
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2018-06-27 21:25:17 +01:00 |
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6c97a6a071
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Coalescing version of the kernel
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2018-06-13 20:52:29 +01:00 |
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73bb2d5128
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Ugly hack to speed up compile on GPU; we don't use the hand kernels on GPU anyway so why compile
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2018-06-13 20:35:28 +01:00 |
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b710fec6ea
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Gpu code first version of specialised kernel
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2018-06-13 20:34:39 +01:00 |
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b2a8cd60f5
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Doubled gauge field is useful
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2018-06-13 20:27:47 +01:00 |
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867ee364ab
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Explicit instantiation hooks
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2018-06-13 20:27:12 +01:00 |
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94d1ae4c82
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Some prep work for GPU shared memory. Need to be careful, as will try GPU direct
RDMA and inter-GPU memory sharing on SUmmit later
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2018-06-13 20:24:06 +01:00 |
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2075b177ef
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CUDA_ARCH more carefule treatment
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2018-06-13 20:22:34 +01:00 |
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847c761ccc
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Move sfw IEEE fp16 into central location
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2018-06-13 20:22:01 +01:00 |
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8287ed8383
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New GPU vector targets
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2018-06-13 20:21:35 +01:00 |
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e6be7416f4
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Use managed memory
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2018-06-13 20:14:00 +01:00 |
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26863b6d95
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User Managed memory
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2018-06-13 20:13:42 +01:00 |
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ebd730bd54
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Adding 2D loops
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2018-06-13 20:13:01 +01:00 |
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066be31a3b
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Optional GPU target SIMD types; work in progress and trying experiments
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2018-06-13 20:07:55 +01:00 |
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eb7d34a4cc
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GPU version
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2018-05-14 19:41:47 -04:00 |
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aab27a655a
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Start of GPU kernels
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2018-05-14 19:41:17 -04:00 |
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93280bae85
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Gpu option
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2018-05-14 19:40:58 -04:00 |
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c5f93abcd7
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GPU clean up
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2018-05-14 19:40:33 -04:00 |
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d5deef782d
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Useful debug comments
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2018-05-14 19:39:52 -04:00 |
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5f50473c0d
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Clean up
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2018-05-14 19:39:11 -04:00 |
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13f50406e3
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Suppress print statement
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2018-05-12 18:00:00 -04:00 |
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09cd46d337
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Lane by Lane operation
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2018-05-12 17:59:35 -04:00 |
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d3f51065c2
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Give command line control of blocks/threads split
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2018-05-12 17:58:56 -04:00 |
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925ac4173d
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Thread count control for warp scheduler thingy doodaa thing
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2018-05-12 17:58:22 -04:00 |
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a8a0bb85cc
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Control scalar execution or vector under generic. Disable Eigen vectorisation on powerpc / SUmmit
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2018-04-12 12:32:57 -04:00 |
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6411caad67
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work distribution
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2018-04-12 11:41:41 -04:00 |
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7533035a99
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Control Eigen vectorisatoin
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2018-04-12 11:40:56 -04:00 |
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b15db11c60
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Kernels -> pure static object to enable device execution
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2018-03-24 19:35:20 -04:00 |
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f6077f9d48
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Kernels -> not instantiaed otherwise object ref on GPU
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2018-03-24 19:33:44 -04:00 |
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572954ef12
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Kernels not an instantiated object, just static
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2018-03-24 19:33:13 -04:00 |
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cedeaae7db
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Lebesge -> StencilView if necessary
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2018-03-24 19:32:41 -04:00 |
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e6cf0b1e17
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View typedefs go to OperatorImpl
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2018-03-24 19:32:11 -04:00 |
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5412628ea6
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begin end lamda
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2018-03-24 19:31:45 -04:00 |
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1f70cedbab
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Have to make all kernel called routines static since object reference will be a host pointer on GPU
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2018-03-24 19:29:26 -04:00 |
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b50f37cfb4
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Remove overlap comms flag
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2018-03-24 19:28:53 -04:00 |
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cb0d2a1b03
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threaded rng init; I thought this was on
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2018-03-24 19:28:17 -04:00 |
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4e1272fabf
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Kernels need to be static to work on GPU. No reference to host resident data
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2018-03-22 18:44:53 -04:00 |
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607dc2d3c6
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Remove lebesgue order
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2018-03-22 18:23:09 -04:00 |
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