Julian Lenz
|
921e23e83c
|
Separated out everything SU specific
|
2022-11-28 17:47:50 +00:00 |
|
Julian Lenz
|
b8f1f5d2a3
|
Introduce GaugeGroup
|
2022-11-25 17:45:32 +00:00 |
|
Julian Lenz
|
9273f2937c
|
Autoformat google style
|
2022-11-25 17:44:08 +00:00 |
|
Alessandro Lupo
|
22064c7e4c
|
Fixing #11
|
2022-11-25 13:10:29 +00:00 |
|
Alessandro Lupo
|
2de03e5172
|
Revert "Revert "Fixing issue #11: consistent use of ncolour and nsp""
This reverts commit 3af4929ddab4caee9f561f835de30a2c8bc527c5.
|
2022-11-23 19:40:28 +00:00 |
|
Alessandro Lupo
|
3af4929dda
|
Revert "Fixing issue #11: consistent use of ncolour and nsp"
This reverts commit 1ba429345bda00f277455611bb4c8142588bf558.
|
2022-11-23 19:34:59 +00:00 |
|
Alessandro Lupo
|
1ba429345b
|
Fixing issue #11: consistent use of ncolour and nsp
|
2022-11-23 18:45:01 +00:00 |
|
Alessandro Lupo
|
88bdd4344b
|
2indx antisymm representation of sp2n
|
2021-11-04 18:27:35 +00:00 |
|
Alessandro Lupo
|
4044536eea
|
add projection on sp2n algebra
|
2021-10-26 10:20:44 +01:00 |
|
Alessandro Lupo
|
4d8ae6221c
|
fix projection
|
2021-10-22 10:44:54 +01:00 |
|
Alessandro Lupo
|
4e31e4e094
|
Better tests
|
2021-10-13 15:07:23 +01:00 |
|
Alessandro Lupo
|
0d6674e489
|
hot start for sp2n
|
2021-10-12 18:53:54 +01:00 |
|
Alessandro Lupo
|
b145fd4f5b
|
necessary to merge
|
2021-10-12 17:08:46 +01:00 |
|
Alessandro Lupo
|
8a5b794f25
|
necessary change to merge with upstrm
|
2021-10-12 16:04:03 +01:00 |
|
Alessandro Lupo
|
89457e25e3
|
sp fermion instantiation
|
2021-10-12 16:00:32 +01:00 |
|
Alessandro Lupo
|
7ff3e5eed4
|
gauge and fermion implementation for sp2n
|
2021-10-12 16:00:32 +01:00 |
|
Alessandro Lupo
|
19eb51cf41
|
sp2n generators
|
2021-10-12 15:53:33 +01:00 |
|
Alessandro Lupo
|
b6496b6cb5
|
sp fermion instantiation
|
2021-10-11 16:32:10 +01:00 |
|
Alessandro Lupo
|
11fb943b1e
|
gauge and fermion implementation for sp2n
|
2021-10-11 16:21:25 +01:00 |
|
Alessandro Lupo
|
046a23121e
|
sp2n generators
|
2021-10-05 15:51:22 +01:00 |
|
|
|
a976fa6746
|
expose gauge group in GImpl and generic Nc fix
|
2021-10-05 14:19:47 +01:00 |
|
Luchang Jin
|
4b24800132
|
AVX512 drop mixed precision as well
|
2021-09-15 16:29:47 -04:00 |
|
Christoph Lehner
|
3d0f88e702
|
A64FX drop mixed precision as well
|
2021-09-15 18:38:32 +02:00 |
|
Peter Boyle
|
86e33c8ab2
|
Significant GPU perf speed up finished
|
2021-09-14 16:14:23 +01:00 |
|
Peter Boyle
|
a7b943b33e
|
Remove half prec comms
|
2021-09-14 05:05:33 +01:00 |
|
Peter Boyle
|
7440cde92f
|
No half prec comms; coalesced access on GPU
|
2021-09-14 05:04:56 +01:00 |
|
Peter Boyle
|
0fc662bb24
|
Dirac cuda 11.4 happy ; force host for functions accessing mult table
ET runs these on host BEFORE lodging result in AST for kernel
|
2021-09-14 05:00:44 +01:00 |
|
Peter Boyle
|
4c88104a73
|
Fix compile warns
|
2021-09-11 23:08:05 +01:00 |
|
Peter Boyle
|
73b944c152
|
Drop half prec comms for now.
|
2021-09-11 23:07:18 +01:00 |
|
Peter Boyle
|
d1b0b7f5c6
|
Half prec comms dropping
|
2021-09-11 23:05:40 +01:00 |
|
Peter Boyle
|
381d8797d0
|
Drop half prec comms for now
|
2021-09-11 23:05:02 +01:00 |
|
u61464
|
8cfc7342cd
|
staggered hand unroll read coalesce
|
2021-05-05 14:17:18 -07:00 |
|
|
|
cf2923d5dd
|
Jamie's fix
|
2021-04-27 16:53:37 +01:00 |
|
|
|
009ccd581e
|
bugfix 3D stout smearing
|
2021-04-26 10:36:33 +01:00 |
|
|
|
895244ecc3
|
Merge with upstream; implemented conserved tadpole for Shamir action.
|
2021-04-06 13:46:33 +01:00 |
|
|
|
addeb621a7
|
Implemented tadpole operator for Shamir action.
|
2021-04-06 13:45:37 +01:00 |
|
Peter Boyle
|
bb89a82a07
|
Staggered coalseced read
|
2021-03-29 20:01:15 +02:00 |
|
Peter Boyle
|
9c2b37218a
|
sRNG parameter added
|
2021-03-18 06:24:11 -04:00 |
|
Peter Boyle
|
51f506553c
|
Read out the local ID once, and store
|
2021-03-12 15:33:04 +01:00 |
|
u61464
|
0e21adb3f6
|
Gives 200GF/s on SyCL/DG1 8^4, doesn't uglify develop for other platforms too badly.
Easy to revert to clean more C++ stylistic code. Theres a SYCL_HACK macro I will clean up later once dpcpp
evolves a central nervous systems.
|
2021-03-10 05:40:51 -08:00 |
|
Peter Boyle
|
a9604367c1
|
Merge pull request #336 from lehner/feature/gpt
Make ShmDims configurable; adjust GRID_MAX_SIMD to allow for 128 byte width on GPUs
|
2021-03-05 13:17:19 -05:00 |
|
|
|
7a19432e0b
|
whitespace
|
2021-03-05 10:57:09 +00:00 |
|
|
|
9b15704290
|
tested and consitent
|
2021-03-05 10:42:32 +00:00 |
|
|
|
3b06e4655e
|
Merge branch 'develop' into feature/XiToSigma
|
2021-03-04 20:06:16 +00:00 |
|
|
|
d4b4de8f42
|
changes
|
2021-03-04 20:01:24 +00:00 |
|
Peter Boyle
|
c90beee774
|
Merge branch 'develop' of https://github.com/paboyle/Grid into develop
|
2021-03-03 23:50:29 +01:00 |
|
Peter Boyle
|
1eea9d73b9
|
Pass serial RNG around
|
2021-03-03 23:50:01 +01:00 |
|
u61464
|
679d1d22f7
|
Sycl happier
|
2021-03-03 11:21:43 -08:00 |
|
Peter Boyle
|
442336bd96
|
Hand unrolled to use optimised code paths on GPU for coalesced reads in Wilson case.
Other cases to do. This now includes comms code path.
|
2021-03-02 14:50:51 +01:00 |
|
Christoph Lehner
|
9c9566b9c9
|
Merge pull request #23 from paboyle/develop
Sync
|
2021-03-01 12:33:51 +01:00 |
|
