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7,192 Commits 86 Branches 14 Tags 74 MiB
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Author SHA1 Message Date
Peter Boyle
b4f2ca81ff Copy queue and compute queue same as better concurrency 2023-04-11 12:18:21 -07:00
Peter Boyle
d1dea5f840 New driver 2023-04-11 12:16:52 -07:00
Peter Boyle
54f8b84d16 Fence 2023-04-11 12:16:08 -07:00
Peter Boyle
da503fef0e Name change on barrier routine 2023-04-11 12:14:04 -07:00
Peter Boyle
86dac5ff4f Better printing 2023-04-04 07:42:19 -07:00
Peter Boyle
4a382fad3f Use distinct SYCL queue for copies 2023-04-04 07:41:41 -07:00
Peter Boyle
cc753670d9 Barrier elimination, surface list build 2023-04-04 07:39:14 -07:00
Peter Boyle
cc9d88ea1c Fence changes and EXT kernel loop cout reduction 2023-04-04 07:37:23 -07:00
Peter Boyle
b281b0166e Put the barrier in the subroutine 2023-04-04 07:36:03 -07:00
Peter Boyle
6a21f694ff Apply barrier in Gather kernel sequence. 
Could place before comms, or in Gather, but decided to insist Gather means Gather is done
 2023-04-04 07:33:24 -07:00
Peter Boyle
af64c1c6b6 Had managed to drop the accelerator_barrier() in the Wilson Compressor gather 2023-03-30 17:34:44 -04:00
Peter Boyle
866f48391a Temporary fix for develop incorrect results 2023-03-30 17:10:13 -04:00
Peter Boyle
a4df527d74
Merge pull request #428 from mmphys/bugfix/comm_none 
Fixes for --enable-comms=none
 2023-03-30 08:38:14 -04:00
Michael Marshall
5764d21161 Fixes for --enable-comms=none 2023-03-30 10:15:28 +01:00
Peter Boyle
496d04cd85 Weaken the Fence 2023-03-29 18:58:51 -04:00
Peter Boyle
10e6d7c6ce Merge branch 'feature/dirichlet' into develop 2023-03-29 16:26:47 -04:00
Peter Boyle
c42e25e5b8 Dirichlet remove 2023-03-29 16:25:52 -04:00
Peter Boyle
a00ae981e0 Fence propagation from SYCL 2023-03-29 15:00:40 -04:00
Peter Boyle
58e020b62a Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet 2023-03-29 14:37:40 -04:00
Peter Boyle
a7e1aceeca Compile fix on Nvidia 2023-03-29 14:36:50 -04:00
Peter Boyle
7212432f43 More careful fencing 2023-03-28 20:10:22 -07:00
Peter Boyle
4a261fab30 Changes premerge to develop 2023-03-28 20:04:21 -07:00
Peter Boyle
6af97069b9 Preparing for close of feature/dirichlet 
Initial code change review complete
 2023-03-28 13:39:44 -07:00
Peter Boyle
5068413cdb Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet 2023-03-28 08:35:38 -07:00
Peter Boyle
71c6960eea Commet 2023-03-28 08:34:24 -07:00
Peter Boyle
ddf6d5c9e3 Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet 2023-03-28 11:33:05 -04:00
Peter Boyle
900e01f49b Temporary 2023-03-27 21:35:06 -07:00
Peter Boyle
2376156fbc Merge branch 'develop' into feature/dirichlet 2023-03-27 21:33:50 -07:00
Peter Boyle
3f2fd49db4 Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2023-03-27 17:29:54 -07:00
Peter Boyle
0efa107cb6 Script update 2023-03-27 17:29:43 -07:00
Peter Boyle
8feedb4f6f Include files moved 2023-03-27 17:29:21 -07:00
Peter Boyle
05e562e3d7 Move the copy synch out to stencil and do one per call instead of one per packet 2023-03-27 17:28:38 -07:00
Peter Boyle
dd3bbb8fa2 MOve the synchronise out to the stencil so one call instead of one call per packet 2023-03-27 17:27:45 -07:00
Peter Boyle
2fbcf13c46 SYCL fix 2023-03-27 14:25:14 -07:00
Peter Boyle
4ea48ef0c4
Merge pull request #419 from lehner/feature/gpt 
Separate rankSum from sum
 2023-03-24 15:42:16 -04:00
Peter Boyle
5c85774ee3 Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet 2023-03-24 15:40:57 -04:00
Peter Boyle
d8a9a745d8 stream synchronise 2023-03-24 15:40:30 -04:00
Peter Boyle
dcf172da3b
Merge pull request #415 from paboyle/feature/block_lanczos22 
Feature/block lanczos22
 2023-03-24 12:08:16 -04:00
Peter Boyle
d57ed25071
Merge branch 'feature/dirichlet' into feature/block_lanczos22 2023-03-24 12:08:09 -04:00
Peter Boyle
546be724e7
Merge pull request #421 from UniOfLeicester/feature/accel_Copy_plane 
Populate the Cshift_table in the GPU
 2023-03-24 12:04:06 -04:00
Peter Boyle
8a1b9073f9 Mshift update 2023-03-23 15:39:30 -04:00
Peter Boyle
1a7114d4b9 Temporary algorithm while sorting out mixed prec 2023-03-23 15:38:35 -04:00
Peter Boyle
3f385f717c Merge branch 'feature/dirichlet' of https://github.com/paboyle/Grid into feature/dirichlet 
Conflicts:
	systems/PVC/benchmarks/run-2tile-mpi.sh
	systems/PVC/config-command
 2023-03-23 14:52:53 -04:00
Peter Boyle
481bbaf1fc Interface to query memory use 2023-03-23 12:55:31 -04:00
Peter Boyle
281488611a WriteDiscard on construct 2023-03-23 10:28:50 -04:00
Peter Boyle
c180a52518 Merge branch 'feature/dirichlet' of https://www.github.com/paboyle/Grid into feature/dirichlet 2023-03-23 10:28:01 -04:00
Peter Boyle
90130e25e9 TODO list 2023-03-23 10:27:02 -04:00
Peter Boyle
23298acb81
Merge pull request #424 from giltirn/feature/dirichlet-precchange 
Precision change implementation
 2023-03-22 23:04:52 -04:00
Peter Boyle
52384e34cf Discard on construct 2023-03-22 19:40:32 -04:00
Peter Boyle
d0bb033ea2 Device resident GPU block buffer instead of UVM as hit likely UVM 
bug. Code worked on CUDA 11.4 but fails on later drivers (certainly 530.30.02, but need to
find the perlmutter driver version).
 2023-03-22 19:07:32 -04:00