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Author SHA1 Message Date
Peter Boyle cbc995b74c Made better interface 2020-09-01 00:12:54 -04:00
Peter Boyle 8b74174d74 Eigen tensor serialisatiino happy undeer GPU. Regret agreeing to let us couple Eigen types to Grid IO 2020-09-01 00:03:26 -04:00
Peter Boyle e21fef17df real and imag part not in ET 2020-08-31 23:56:26 -04:00
Peter Boyle 3d27708f07 Basic where test 2020-08-31 23:55:49 -04:00
Peter Boyle b918744184 Prettificatoin 2020-08-31 23:54:46 -04:00
Peter Boyle 7d14a3c086 Where working 2020-08-31 23:53:46 -04:00
Peter Boyle e14a84317d GPU math unary calls 2020-08-31 23:50:49 -04:00
Peter Boyle 6c31b99f1f I knew coupling Eigen Tensor to Grid serialisation was a bad iddea. 
Now the complex is different on GPU creates probblems
 2020-08-31 23:49:19 -04:00
Peter Boyle 9522dcd611 Remove dead commented ouot coode 2020-08-31 23:40:29 -04:00
Peter Boyle ed469898dc coalesced ET expressions 2020-08-31 23:38:40 -04:00
Peter Boyle 1eee94a809 Sorting real/im in read coalesced GPU ET 2020-08-31 23:36:49 -04:00
Peter Boyle 3448b7387c Almost there to coalesced ET 2020-08-26 17:04:49 -04:00
Peter Boyle 47b89d2739 Pragma protection improvementt 2020-08-26 17:04:27 -04:00
Peter Boyle 3276aa67dc Update 2020-08-12 14:15:53 -04:00
Peter Boyle 7cf7f11e1a Doc recompile 2020-07-22 14:44:11 -04:00
Peter Boyle ee9889821d Runs through to coarse space solve 2020-06-29 12:59:52 -04:00
Peter Boyle 936c5ecf69 Reduction GPU no compile fix 2020-06-24 17:28:31 -04:00
Peter Boyle 22cfbdbbb3 Boost precision in inner products in single 2020-06-24 12:52:31 -04:00
Peter Boyle 093d1ee21b Force initial values 2020-06-24 08:54:49 -04:00
Peter Boyle d6ba2581ce Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2020-06-24 08:25:08 -04:00
Peter Boyle 577c064184 Memory manager initialise earlier 2020-06-24 08:24:38 -04:00
Peter Boyle 2ff1fa6fad UVM used shared for CPU alloccations andd ddont migrate 2020-06-23 22:14:56 -04:00
Peter Boyle 70be1bd8be Adding code under development 2020-06-23 10:24:21 -04:00
Peter Boyle c48da35921 Memory Vector UVM and Lattice alignedAllocator separate 2020-06-22 20:21:53 -04:00
Peter Boyle 6c5fa8dcd8 Aligned allocate on CPU put through this interface 2020-06-20 14:34:29 -04:00
Peter Boyle 0d2f913a1a String.h for linux 2020-06-20 09:37:31 -04:00
Peter Boyle 1a74816c25 Hopeefully fixed 2020-06-19 17:50:52 -04:00
Peter Boyle 73de335256 Merge branch 'develop' into sycl 2020-06-19 17:44:16 -04:00
Peter Boyle 228fd450ce Typo fix (excusee - my keyboard is starting to break) 2020-06-19 17:36:05 -04:00
Peter Boyle b949cf6b12 PeekLocal needs a view to keep thread safe. 
ALLOCATION_CACHEE reenable
 2020-06-19 17:13:27 -04:00
Peter Boyle 11bc1aeadc TThread count defaultt to fastest 2020-06-19 14:30:35 -04:00
Peter Boyle 66005929af Set up the cache size on all ranks 2020-06-19 12:50:54 -04:00
Peter Boyle ff7c847735 Merge branch 'sycl' of https://github.com/paboyle/Grid into sycl 2020-06-19 01:22:16 -04:00
Peter Boyle 1aa988b2af Comms overlap fix UVM case 2020-06-19 01:21:14 -04:00
Peter Boyle edf17708a8 Range improvement 2020-06-18 22:41:06 -04:00
Peter Boyle 32b2b59be4 Offload 2020-06-10 20:36:26 -04:00
Peter Boyle 86bb0cc24b Keep on GPU 2020-06-10 20:00:00 -04:00
Peter Boyle 84c19587e7 Offload 2020-06-10 19:59:31 -04:00
Peter Boyle 237ce92540 Offload loops 2020-06-10 19:59:11 -04:00
Peter Boyle a7ffc61e82 acceleratorSIMTlane() 2020-06-10 19:58:33 -04:00
Peter Boyle fd97f64612 Merge branch 'sycl' of https://github.com/paboyle/Grid into sycl 2020-06-10 12:58:13 -04:00
Peter Boyle 8720aecb80 Offload more loops 2020-06-10 12:57:55 -04:00
Peter Boyle cdf0a04fc5 Merge branch 'develop' into sycl 2020-06-09 04:00:12 -04:00
Peter Boyle 616d3dd737 CCommpile updates 2020-06-08 18:57:41 -04:00
Peter Boyle 8b066baca8 Implement transient mechanism 2020-06-08 18:28:53 -04:00
Peter Boyle e97f3688db Fix the HMC issue - kernel was launchnig asynchronously 2020-06-08 17:01:15 -04:00
Peter Boyle 89a1e78390 Merge branch 'sycl' of https://github.com/paboyle/Grid into sycl 2020-06-05 23:20:37 -04:00
Peter Boyle 5a73ef3647 Minor tweak to compile 2020-06-05 21:50:15 -04:00
Peter Boyle 87e5d2f4b7 Merge branch 'sycl' of https://www.github.com/paboyle/Grid into sycl 2020-06-05 17:32:21 -07:00
Peter Boyle d720f10758 Liink error fix 2020-06-05 17:29:20 -07:00
Peter Boyle 14fcd0912a Merge branch 'sycl' of https://github.com/paboyle/Grid into sycl 2020-06-05 19:14:17 -04:00
Peter Boyle 3111c0bd4f Single precisiono hardwire 2020-06-05 19:13:27 -04:00
Peter Boyle e03064490e Merge branch 'sycl' of https://github.com/paboyle/Grid into sycl 2020-06-05 18:53:39 -04:00
Peter Boyle 1a4c8c3387 Global edit with change to View usage. autoView() creates a wrapper object that closes the view when scope closes. 2020-06-05 18:52:35 -04:00
Peter Boyle 2b1e259441 Decode of SYCL devices fix 2020-06-04 17:16:55 -07:00
Peter Boyle f39c2a240b Priintinig and device memory size detection 2020-06-04 14:58:03 -04:00
Peter Boyle 0d95805cde Print improvement 2020-06-03 22:50:32 -04:00
Peter Boyle f67830587f Accelerator loop use 2020-06-03 22:50:09 -04:00
Peter Boyle 6bf7f839ff Better printing and logging 2020-06-03 09:28:57 -04:00
Peter Boyle e3147881a9 Cache scheme 2020-06-03 09:23:48 -04:00
Peter Boyle fb559614ad Initialise meemory manager 2020-06-03 09:12:47 -04:00
Peter Boyle e93e12b6a4 More verbose SYCL setup 2020-06-03 09:12:11 -04:00
Peter Boyle 0c3112cd94 Use view mechanism 2020-06-03 09:11:51 -04:00
Peter Boyle 8cfd5d2639 Need lattice view 2020-06-03 09:11:28 -04:00
Peter Boyle 1c9f20b15e Views must be closed 2020-06-03 09:10:29 -04:00
Peter Boyle 32237895bd Reorg memory manager for O(1) hash table 2020-06-03 09:09:52 -04:00
Peter Boyle c5c2dbc0ce Optional CUDA info 2020-06-02 14:21:49 -04:00
Peter Boyle 1d252d0922 Accelerator inline 2020-05-28 11:45:25 -04:00
Peter Boyle 006cc8a8f1 Staggereed move to accelerator 2020-05-28 08:33:06 -04:00
Peter Boyle cf2938688a Sycl unhappy fix 2020-05-25 08:36:53 -07:00
Peter Boyle ee63721bad int unhappiness sycl fix 2020-05-25 08:36:24 -07:00
Peter Boyle 22c5168d70 Sycl happier 2020-05-25 08:35:56 -07:00
Peter Boyle 949ac3cd24 Must avoid non-trivial copy constructors 2020-05-25 08:35:28 -07:00
Peter Boyle 7bc0166c1c SYCLL maknig happy - must avoid non ttrivial copy constructors 2020-05-25 08:34:19 -07:00
Peter Boyle cb0d1b3399 hopefullly fix buildd fail 2020-05-24 21:27:00 -04:00
Peter Boyle d1f1ccc705 HIP changes 2020-05-24 21:18:49 -04:00
Peter Boyle c7519a237a Assertions fail on HIP foor unknown reasons - dedbugging 2020-05-24 14:02:47 -04:00
Peter Boyle 32be2b13d3 Updates for HiP 2020-05-24 14:00:55 -04:00
Peter Boyle 92b342a477 Hip reduction too 2020-05-24 13:50:28 -04:00
Peter Boyle 556da86ac3 HIP fp16 2020-05-24 13:41:58 -04:00
Peter Boyle 8285e41574 View location / access mode 2020-05-21 16:14:41 -04:00
Peter Boyle f999408e92 View locatoin and access mode 2020-05-21 16:14:20 -04:00
Peter Boyle a7abda89e2 View location & access mode 2020-05-21 16:13:59 -04:00
Peter Boyle 7860a50f70 Make view specify where and drive data motion - first cut. 
This is a compile tiime option --enable-unified=yes/no
 2020-05-21 16:13:16 -04:00
Peter Boyle ebb60330c9 Automatic data motion options beginning 2020-05-17 16:34:25 -04:00
Peter Boyle a9847aa866 Dependence fix 2020-05-12 20:03:37 -04:00
Peter Boyle 2e652431e5 No compile on summiit fix 2020-05-12 18:56:47 -04:00
Peter Boyle 8b5b55b682 Make tests all compile ccurrent Grid, mostly MdagM removal of norms fixes but a few minor 
issues fiixed too
 2020-05-12 17:57:24 -04:00
Peter Boyle 0e3c49f687 TransposeIndex was broken by Christoph 2020-05-12 17:57:01 -04:00
Peter Boyle cb7ee37562 Close expressions in arg to cshift 2020-05-12 17:56:40 -04:00
Peter Boyle 82f71643a4 Remove the norm in MdagM 2020-05-12 17:55:53 -04:00
Peter Boyle d24d8e8398 Use X-direction as more bits meaningful on CUDA. 
2^31-1 shoulddd always bee enough for SIMD and thread reduced local volume

e.g. 32*2^31 = 2^36 = (2^9)^4 or 512^4 ias big enough.

Where 32 is gpu_threads * Nsimd = 8*4
 2020-05-12 10:35:49 -04:00
Peter Boyle 07c0c02f8c Speed up Cshift 2020-05-11 17:02:01 -04:00
Peter Boyle 8c31c065b5 Keep the Vector fixed to protect it from realloc 2020-05-11 17:00:30 -04:00
Peter Boyle bbbee5660d First compiile on HiP 2020-05-10 05:28:09 -04:00
Peter Boyle ea08f193e7 Allocator cache spliit into large/small pools 2020-05-10 05:24:26 -04:00
Peter Boyle 2bb2c68e15 Separate pools for small and large allocations cache 2020-05-09 22:57:21 -04:00
Peter Boyle efe5bc6a3c Split allocator cache into two pools of different sizes 2020-05-09 22:27:56 -04:00
Peter Boyle 384da487bd Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2020-05-08 18:55:11 -04:00
Peter Boyle ee1de82a53 Working ITT benchmark again 2020-05-08 18:54:50 -04:00