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3,688 Commits 92 Branches 14 Tags
dc5b909f99358f4a9c130e7532a3fbc6e903df75
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970 Commits

Author SHA1 Message Date
Chulwoo Jung dc5b909f99 Merge branch 'develop' of https://github.com/paboyle/Grid into feature/Lanczos 2018-06-12 19:11:20 -04:00
Chulwoo Jung 855b249f57 Merge branch 'develop' of https://github.com/paboyle/Grid into merge2 2018-06-12 19:08:06 -04:00
Guido Cossu 95d4b46446 Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2018-06-08 11:30:29 +01:00
Azusa Yamaguchi 7fbbb31a50 Merge branch 'develop' into feature/staggered-comms-compute 
Conflicts:
	lib/qcd/action/fermion/ImprovedStaggeredFermion.cc
 2018-05-21 13:07:29 +01:00
Guido Cossu 7836cc2d74 No checksum output on log for scidac 2018-05-15 10:10:08 +01:00
Peter Boyle 68a5079f33 Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2018-05-04 14:13:54 +01:00
Peter Boyle 8c658de179 Compressor speed up (a little); streaming stores 2018-05-02 17:52:16 +01:00
Guido Cossu e568c24d1d Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2018-05-02 14:29:25 +01:00
Guido Cossu b458326744 Checkpointer module update 2018-05-02 14:29:22 +01:00
Guido Cossu 6e7d5e2243 HMC: added Scidac checkpointer and support for metadata 2018-05-02 14:28:59 +01:00
Peter Boyle 6f6c5c549a Split off gparity 2018-05-02 14:11:23 +01:00
Peter Boyle 1584e17b54 Revert to fast versoin 2018-05-02 14:10:55 +01:00
Azusa Yamaguchi 5c936d88a0 Merge branch 'feature/staggered-comms-compute' of https://github.com/paboyle/Grid into feature/staggered-comms-compute 2018-04-26 10:18:37 +01:00
Azusa Yamaguchi 2cbb72a81c Provide info if EE term is trivial (m^2 factor) 
Better timing in staggered 4d case
 2018-04-26 10:10:07 +01:00
Azusa Yamaguchi 31d83ee046 Enable special treatment of constEE cases 2018-04-26 10:08:46 +01:00
Guido Cossu 6358f35b7e Debug of previous commit 2018-04-26 14:18:11 +09:00
Guido Cossu 43f5a0df50 More timers in the integrator 2018-04-26 12:01:56 +09:00
Guido Cossu a1be533329 Corrected Flop count in Benchmark su3 and expanded the Wilson flow output 2018-04-24 01:19:53 -07:00
paboyle 870b1a85ae Think I have the physical prop interface to CF and PF overlap right, but need a strong check/regression. 
Only support Hw overlap, not Ht for now. Ht needs a new Dminus implemented.
 2018-04-18 14:17:49 +01:00
paboyle b5510427f9 physical fermion interface, cshift benchmark in SU3. 2018-04-18 01:43:29 +01:00
paboyle 276f113f28 IO uses master boss node for metadata. 2018-03-30 16:17:05 +01:00
Chulwoo Jung bc1f5be265 Merge branch 'dev-IRBL-ypj' of https://github.com/yongchull/Grid into merge 2018-03-08 18:02:06 -05:00
Azusa Yamaguchi 80302e95a8 MILC Interface 2018-03-08 15:34:03 +00:00
Chulwoo Jung 0b63e2e9cd Merge branch 'develop' of https://github.com/paboyle/Grid into merge 2018-03-07 15:24:11 -05:00
Azusa Yamaguchi b938202081 Overlapped Comm for Wilson DhopInternal 2018-03-07 14:08:43 +00:00
paboyle c399c2b44d Guido broke the charge conjugate plaquette action with premature optimisation. 
This sector of the code does not matter for anything other than Guido's quenched HMC
studies, and any plaq specific optimisations should be retained in a private branch
instead of destroying the code simplicity.
 2018-03-05 12:55:41 +00:00
Azusa Yamaguchi 0f468e2179 OverlappedComm for Staggered 5D and 4D. 2018-02-22 12:50:09 +00:00
paboyle 7b8b2731e7 Conj error for complex coeffs 2018-02-12 16:06:31 +00:00
Guido Cossu 655a69259a Added support for GCC compilation for Skylake AVX512 2018-01-28 17:02:46 +01:00
Peter Boyle ebb1bebf24 Merge pull request #145 from yongchull/fix-skylake-avx512 
patch to compile with AVX512 for SkyLake Xeon processor using GCC7.2.…
 2018-01-28 11:01:43 +00:00
Yong-Chull Jang 53a9260a94 patch to compile with AVX512 for SkyLake Xeon processor using GCC7.2.0. Beside bug fixes in the source code, a option 'SKL' is added to configure.ac for SkyLake processor specific AVX512 instruction flags when using GCC. Code can be compiled with --enable-simd=SKL using GCC 7.2.0, but Test_simd fails. AVX512 support for complex double type with non-intel compilers makes this error. 2018-01-27 10:00:38 -05:00
Azusa Yamaguchi 97b9c6f03d No option for interior/exterior split of asm kernels since different directions get interleaved 2018-01-22 11:04:19 +00:00
Azusa Yamaguchi 63982819c6 No option to overlap comms and compute for asm implementation since different directions are interleaved 
in the kernels, introducing if else structure would be too painful
 2018-01-22 11:03:39 +00:00
Guido Cossu b00d2d2c39 Correction of Representations compilation and small compilation error for Intel 17 2018-01-17 13:46:12 +00:00
Guido Cossu 3923683e9b Updating the feature/clover branch with the newest Hadron package 2018-01-12 13:35:51 +00:00
portelli 7bb405e790 Merge branch 'develop' into feature/hadrons 
# Conflicts:
#	lib/communicator/Communicator_mpi3_leader.cc
#	lib/communicator/Communicator_shmem.cc
 2018-01-11 18:50:15 +00:00
David Preti a3affac963 SU3 restored + output filename for mesons and baryons fixed. 2018-01-10 14:56:54 +01:00
Azusa Yamaguchi 24162c9ead Staggered overlap comms comput 2018-01-09 13:02:52 +00:00
paboyle 43e48542ab Merge branch 'develop' of https://github.com/paboyle/Grid into develop 2018-01-08 11:34:45 +00:00
paboyle 6ecf280723 Simplify comms layer proliferation 2018-01-08 11:28:04 +00:00
portelli 6718fa8c4f Merge branch 'feature/scalar_adjointFT' into feature/hadrons 2017-12-26 12:59:33 +01:00
Yong-Chull Jang 3cb8cb7282 'typename' is added to compile with AVX512 using GCC7.2.0; a semicolon was missing in Grid_avx512.h and the bug is fixed. Option SKL is added to configure script for skylake processor specific AVX512 operations. Code can be compiled with --enable-simd=SKL using GCC 7.2.0, but Test_simd fails. AVX512 support for complex double type with non-intel compilers makes this error; it needs a review. 2017-12-23 14:54:07 -05:00
pretidav 4ce63af7d5 Working on Hadrons with Hirep. (QCD is set for SU4) 2017-12-22 19:02:07 +01:00
Chulwoo Jung 3dbc8586fa Merge branch 'develop' of https://github.com/paboyle/Grid into feature/Lanczos 2017-12-12 21:23:01 -05:00
portelli 2401360784 Merge pull request #138 from guelpers/feature/hadrons 
bug fix in sequential insertion of conserved vector current
 2017-12-11 18:53:41 +01:00
Vera Guelpers 2cfb50cbe5 bug fix in sequential insertion of conserved vector current 2017-12-08 11:13:39 +00:00
portelli 0a038ea15a Merge branch 'develop' into feature/hadrons 2017-12-06 16:49:10 +01:00
portelli 62eb1f0e59 FermionOperator virtual destructor needed for polymorphism 2017-12-06 16:48:17 +01:00
paboyle ae3b7713a9 Cold start doesnt need RNG 2017-12-05 11:36:31 +00:00
portelli 33cb509d4b Merge branch 'develop' into feature/hadrons 2017-12-01 19:45:32 +00:00