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  • 9472b02771 Parallel_for elimination -> thread_loop. paboyle 2018-01-28 01:00:55 +00:00
  • 9597ab94eb Zero changes, swap on lattice type. paboyle 2018-01-27 23:51:40 +00:00
  • ce4da83bc2 Zero changes, literally paboyle 2018-01-27 23:51:10 +00:00
  • d557f3ef77 Zero changes (literally) and also a warning elimination paboyle 2018-01-27 23:50:43 +00:00
  • f574c20118 Zero changes, __VA_ARGS__ and swap paboyle 2018-01-27 23:50:17 +00:00
  • f102897385 VA_ARGS to make comma safe automatic paboyle 2018-01-27 23:49:47 +00:00
  • d6fce3e498 Zero changes, literally paboyle 2018-01-27 23:48:01 +00:00
  • 2d0bcc2606 Zero changes, acceleartor on kernels and some thread loop changes paboyle 2018-01-27 23:47:38 +00:00
  • 45df59720e Zero changes and VA_ARGS changes paboyle 2018-01-27 23:46:58 +00:00
  • 44ef5bc207 Zero changes (literally speaking). paboyle 2018-01-27 23:46:28 +00:00
  • 98af36217a Zero changes. (I mean literally) paboyle 2018-01-27 23:46:02 +00:00
  • 4e0cf0cc28 QedFVol: Fix bug in ScalarVP.cc due to double use of temporary object. Still getting mpi3 errors when configured with enable-comms=mpi[-auto]. James Harrison 2018-01-27 15:15:25 +00:00
  • 53a9260a94 patch to compile with AVX512 for SkyLake Xeon processor using GCC7.2.0. Beside bug fixes in the source code, a option 'SKL' is added to configure.ac for SkyLake processor specific AVX512 instruction flags when using GCC. Code can be compiled with --enable-simd=SKL using GCC 7.2.0, but Test_simd fails. AVX512 support for complex double type with non-intel compilers makes this error. Yong-Chull Jang 2018-01-27 10:00:38 -05:00
  • dc6f637e70 change GparityDomainWallFermion to ZMobius and add command line options to read boundary phase and omega Yong-Chull Jang 2018-01-27 08:21:27 -05:00
  • 507c4e9efc Correcting an missing semicolumn in avx512 Guido Cossu 2018-01-27 10:59:55 +01:00
  • be7b37b9c9 Mistake on openmp paboyle 2018-01-27 00:05:11 +00:00
  • c4f82e072b _grid becomes private ; use Grid()§ paboyle 2018-01-27 00:04:12 +00:00
  • 3f9654e397 Hiding internals paboyle 2018-01-26 23:09:03 +00:00
  • 912b50f6fa Hiding lattice internals paboyle 2018-01-26 23:08:45 +00:00
  • 2a4a0e43c1 Hide internals paboyle 2018-01-26 23:08:27 +00:00
  • 32523a229c Hide internals paboyle 2018-01-26 23:08:02 +00:00
  • 1ebd56c3fb Hide internal data paboyle 2018-01-26 23:07:34 +00:00
  • 8dccffdfd5 Hide internal data paboyle 2018-01-26 23:06:51 +00:00
  • 5642ea270f Hide internal data paboyle 2018-01-26 23:06:28 +00:00
  • 43cea62855 Hide internal data paboyle 2018-01-26 23:06:03 +00:00
  • 2b4067bb71 Hide internal data paboyle 2018-01-26 23:05:32 +00:00
  • 85771e97e9 Hide internal data paboyle 2018-01-26 23:04:46 +00:00
  • 8b371ffa94 Hide internal data paboyle 2018-01-26 23:03:54 +00:00
  • bf659dfd92 Hide the ._odata paboyle 2018-01-26 22:27:47 +00:00
  • cdf550845f QedFVol: Fix bugs in StochEm.cc and ChargedProp.cc (still only works without MPI). James Harrison 2018-01-26 21:25:20 +00:00
  • 3db7a5387b BROKEN: Adapted scalarVP, UnitEm and VPCounterTerms modules to new Hadrons. Currently getting an assertion error from Communicator_mpi3.cc when I try to run. James Harrison 2018-01-26 16:33:48 +00:00
  • 76a4dd36d9 Fix no compile of test serialisation paboyle 2018-01-26 00:13:21 +00:00
  • f4010023ca Warning fixes paboyle 2018-01-25 23:46:47 +00:00
  • 24a4589def Changes to interface a little paboyle 2018-01-25 23:37:34 +00:00
  • c904822e74 Warning removal paboyle 2018-01-25 23:37:15 +00:00
  • 40ee1e1957 Zero() paboyle 2018-01-25 23:36:58 +00:00
  • 461df78a3f Better to use Zero(), and not zero static data paboyle 2018-01-25 23:36:22 +00:00
  • db9c9475d4 const paboyle 2018-01-25 23:36:06 +00:00
  • 214f7a6f13 Drop std::vector container for the lattice data paboyle 2018-01-25 23:35:04 +00:00
  • c844cfcda8 Remove commAllocator; make more simple; option to switch off the pointer caceh paboyle 2018-01-25 23:33:57 +00:00
  • a3e3034e6f Host compile paboyle 2018-01-25 23:33:00 +00:00
  • e7cba358c2 Temporary update to reflect the new dropping of std::vector in Lattice Will update again to hide the internals in an interface paboyle 2018-01-25 23:31:41 +00:00
  • f8a5194c70 Merge branch 'develop' of https://github.com/paboyle/Grid into develop Guido Cossu 2018-01-25 13:46:37 +01:00
  • cff3bae155 Adding support for general Nc in the benchmark outputs Guido Cossu 2018-01-25 13:46:31 +01:00
  • 90dffc73c8 Merge branch 'feature/hadrons' into feature/qed-fvol James Harrison 2018-01-24 16:41:44 +00:00
  • 99329197ee Rename header to .h paboyle 2018-01-24 14:10:09 +00:00
  • 421401af55 Remove IMCI as really don't support paboyle 2018-01-24 13:53:21 +00:00
  • 0626c1e39e Accelerator flaggina dn thrust complex for NVCC paboyle 2018-01-24 13:50:41 +00:00
  • 725f03e2e2 Accelerator markup and thrust complex on nvcc paboyle 2018-01-24 13:50:10 +00:00
  • 65f77112e0 Thread loops done properly paboyle 2018-01-24 13:49:39 +00:00
  • 408b868475 Generic for GPU needs accelerator markup of functions paboyle 2018-01-24 13:49:12 +00:00
  • 1c797deb04 Accelerator tweaks paboyle 2018-01-24 13:43:43 +00:00
  • b9d5a42b57 Should be able to eliminate the COMMA_SAFE with VA_ARGS trick ; revisit this file paboyle 2018-01-24 13:42:06 +00:00
  • e737591918 Accelerator loops paboyle 2018-01-24 13:41:12 +00:00
  • ba5ea5830b Acceleartor loops paboyle 2018-01-24 13:40:56 +00:00
  • 43f244badf Thread loops for now; figure out what can be GPU accelerated later here paboyle 2018-01-24 13:40:30 +00:00
  • e9c8ba5ef7 Accelerator loosp paboyle 2018-01-24 13:39:54 +00:00
  • d70709a8e8 Thread construct changes paboyle 2018-01-24 13:39:06 +00:00
  • 733f8ff0b2 Still using parallel_for -- don't know how to implement reduction on GPU yet. Look at some sample code is best. paboyle 2018-01-24 13:38:13 +00:00
  • 0bfa5bb213 Accelerator loosp paboyle 2018-01-24 13:37:26 +00:00
  • 1f26a234f9 CPU loops explicit for peek poke paboyle 2018-01-24 13:36:31 +00:00
  • 13f0116425 Accelerator loops paboyle 2018-01-24 13:35:55 +00:00
  • 25f589b064 Accelerator loops paboyle 2018-01-24 13:35:36 +00:00
  • 210c50a278 Accelerator prep work paboyle 2018-01-24 13:35:13 +00:00
  • 549a143e78 Accelerator related paboyle 2018-01-24 13:34:46 +00:00
  • 277301486d Simple warning elimination paboyle 2018-01-24 13:34:15 +00:00
  • c851b39a49 Nicer way of including aggregate paboyle 2018-01-24 13:33:34 +00:00
  • 15cc12eb6c Delete the old non ET file paboyle 2018-01-24 13:33:07 +00:00
  • ae4f1f8c12 New file, split out two from Lattice_reduction paboyle 2018-01-24 13:32:43 +00:00
  • 5609624b44 Threading constructs replaced paboyle 2018-01-24 13:32:24 +00:00
  • b5a947dd79 Change to make NVCC happy paboyle 2018-01-24 13:32:02 +00:00
  • ee16f62322 stray semicolon elimination. NVCC is picky, but eventually picked up these diags with a pragma to suppress paboyle 2018-01-24 13:31:17 +00:00
  • 3318de27d6 Thread macro changes paboyle 2018-01-24 13:30:23 +00:00
  • ac56965306 GPU changes and threading macros replaced paboyle 2018-01-24 13:28:30 +00:00
  • 8e99264f40 Accelerator mark up of entire tensore space for offload paboyle 2018-01-24 13:27:30 +00:00
  • 69327db9a9 Improviements for NVCC. Eigen is not compat with CUDA 9 and must hack to disable device compilation paboyle 2018-01-24 13:25:07 +00:00
  • 7331ee2d80 Warnings control to overpower the NVCC compiler paboyle 2018-01-24 13:24:36 +00:00
  • 918c105c57 NVCC warning elimination paboyle 2018-01-24 13:23:59 +00:00
  • be1511d469 Remove old macros for threading paboyle 2018-01-24 13:23:24 +00:00
  • f1c31df9d2 updated Eigen version. Still didn't fix CUDA 9 no compile. Worked around by switching off __NVCC__ during the include of Eigen and switching it back on after. No Eigen code can be offloaded, note as a rsult of this. No harm done. paboyle 2018-01-24 13:19:29 +00:00
  • ff7b587fad Ugly... nvcc needs -x cu to compile .cc as cuda. Since CXXFLAGS is Also passed to linker, and -x cu breaks link phase must replace CXX and CXXLD with nvcc -x cu and nvcc -link respectively. paboyle 2018-01-24 13:18:19 +00:00
  • 4e1135b214 Updated pugixml to v1.8; still didn't fix no compile under nvcc. Turns out nvcc was right; must to an explicit template instantiation that was missing but left gcc, icpc and clang happy for some reason. Fix this. paboyle 2018-01-24 13:17:10 +00:00
  • acd4955a18 remove rdtsc on __NVCC__ as may be device called paboyle 2018-01-24 13:16:18 +00:00
  • bd08dc4f45 Pragma use for nvcc, warning elimination. paboyle 2018-01-24 13:15:43 +00:00
  • 22d137d4e5 Namespace, nvcc warning elimination. paboyle 2018-01-24 13:14:43 +00:00
  • 87ee592176 Pragma changes and layout and warning elimination for nvcc paboyle 2018-01-24 13:14:09 +00:00
  • 063603b1ea Warning elimination paboyle 2018-01-24 13:12:14 +00:00
  • f292106db6 Split out pragms from threads.h; More work needed; renam threads directory to "parallelism" or something like that paboyle 2018-01-24 13:11:04 +00:00
  • 9d08aebea9 Compile through nvcc ; warning elimination fixes paboyle 2018-01-24 13:09:53 +00:00
  • 4e30739093 First compile OK through nvcc on host paboyle 2018-01-24 13:08:47 +00:00
  • a1151fc734 Hadrons: MPI-safe serial IO portelli 2018-01-23 17:26:50 +00:00
  • ab3baeb38f Implement contractions and data output in functions; calculate diagrams S, X and 4C separately; output 2E and 2T instead of sunset_shifted, sunset_unshifted, tadpole_shifted, tadpole_unshifted; add comments. James Harrison 2018-01-23 17:07:45 +00:00
  • 389731d373 changed SeqConservedSummed.hpp to work with new hadrons interface Vera Guelpers 2018-01-23 10:11:33 +00:00
  • 6e3ce7423e Hadrons: don't display module list at startup (too long) portelli 2018-01-22 20:04:05 +00:00
  • 15f15a7cfd Merge branch 'develop' into feature/hadrons portelli 2018-01-22 20:03:36 +00:00
  • 0e5f626226 Hadrons: module for scalar operator divergence portelli 2018-01-22 19:37:47 +00:00
  • 04f92ccddf WilsonMG: Provide a fix for the previous commit; compiles and runs successfully now Daniel Richtmann 2018-01-22 13:22:29 +01:00
  • 3b2d805398 WilsonMG: Some first steps towards coarse spin dofs; not compiling yet Daniel Richtmann 2018-01-20 18:48:53 +01:00
  • 97b9c6f03d No option for interior/exterior split of asm kernels since different directions get interleaved Azusa Yamaguchi 2018-01-22 11:04:19 +00:00
  • 63982819c6 No option to overlap comms and compute for asm implementation since different directions are interleaved in the kernels, introducing if else structure would be too painful Azusa Yamaguchi 2018-01-22 11:03:39 +00:00