Antonin Portelli portelli
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  • Joined on 2017-10-25
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portelli synced commits to refs/heads/refs/pull/449/merge at portelli/Grid from mirror 2023-12-27 04:21:44 +00:00
a09aa352a9 Merge 37d1d87c3c into 2a0d75bac2
2a0d75bac2 Aurora files
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portelli synced commits to refs/heads/refs/pull/379/merge at portelli/Grid from mirror 2023-12-27 04:21:44 +00:00
807c0b46e8 Merge 32e6d58356 into 2a0d75bac2
2a0d75bac2 Aurora files
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portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-12-23 02:21:45 +00:00
b7c7000d0d Don't need the numerical rounding tolerance in multigrid
551f6c4edd Synchronise changes
defd814750 Speed up the coarsened matrix matrix evaluation.
3d517bbd2a Synchronise decouple from the launch
78ab955fec Better padded cell exchange
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portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-12-22 01:51:43 +00:00
66a1b63aa9 Faster grid/blas layout change.
22c611bd1a Delete temp file
c9bb1bf8ea Passing new BLAs based
9e489887cf General coarse multiRHS move to BLAS implementation
9feb801bb9 Much simpler GPU implementation
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portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-12-22 01:51:43 +00:00
2a0d75bac2 Aurora files
portelli pushed to main at portelli/lattice-benchmarks 2023-12-20 15:06:42 +00:00
ba00493c7d Merge pull request 'fix incompatibility with latest Grid' (#5) from simon.buerger/lattice-benchmarks:main into main
6ea093fc80 fix incompatibility with latest Grid
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portelli merged pull request portelli/lattice-benchmarks#5 2023-12-20 15:06:42 +00:00
fix incompatibility with latest Grid
portelli synced commits to refs/heads/refs/pull/379/merge at portelli/Grid from mirror 2023-12-12 13:11:44 +00:00
e5bc679fef Merge 32e6d58356 into f48298ad4e
f48298ad4e Bug fix
645e47c1ba Config for Ampere Altra ARM
d1d9827263 Integrator logging update
14643c0aab SDCC benchmarking scripts for A100 nodes and IceLake nodes (AVX512)
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portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-12-12 05:01:44 +00:00
f48298ad4e Bug fix
portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-12-09 03:31:44 +00:00
645e47c1ba Config for Ampere Altra ARM
portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-12-08 19:21:45 +00:00
d1d9827263 Integrator logging update
portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-12-05 01:31:44 +00:00
14643c0aab SDCC benchmarking scripts for A100 nodes and IceLake nodes (AVX512)
portelli synced commits to refs/heads/develop at portelli/Grid from mirror 2023-11-30 23:31:44 +00:00
b77a9b8947 SDDC compiles starting
portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-29 14:51:44 +00:00
2c54be651c Further updates
portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-28 22:31:44 +00:00
e859a199df Reduce volume to interior for coarse stencil -- worth up to 4x gain
portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-28 14:21:44 +00:00
0a3682ad0b MultiRHS work
portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-24 20:31:44 +00:00
59abaeb5cd Time stamp
portelli synced commits to refs/heads/refs/pull/379/merge at portelli/Grid from mirror 2023-11-24 12:21:43 +00:00
b391af4489 Merge 32e6d58356 into 7d077fe493
7d077fe493 Frontier compiel
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portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-24 04:11:44 +00:00
3e448435d3 Restrict to interior
a294bc3c5b Relax constraints for multiRHS
b302ad3d49 multiRHS test in place, passes Yay!
82fc4b1e94 Finalise
b4f1740380 Finalise message
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portelli synced commits to refs/heads/feature/scidac-wp1 at portelli/Grid from mirror 2023-11-16 00:11:44 +00:00
09946cf1ba Improved, works on 48^3 moving to multiRHS optimisations
f4fa95e7cb Use 5.3.0
100e29e35e Allow expression as argument to norm2
4cbe471a83 devVector
8bece1f861 Faster to transpose the matrix and apply with column major order
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