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438caab25f
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generate_instantiations.sh now correctly produces instantiations for CompactClover variant, redundant instantiations removed.
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2022-02-27 18:27:18 +00:00 |
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Christoph Lehner
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9616811c3d
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Merge branch 'feature/gpt' of https://github.com/lehner/Grid into feature/gpt
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2022-02-24 22:03:05 +01:00 |
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Christoph Lehner
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8a3002c03b
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separate left and right masses for CayleyFermion5D
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2022-02-24 22:02:56 +01:00 |
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Peter Boyle
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0f1c5b08a1
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Dirichlet filters running on AMD and now integrated in Fermion op
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2022-02-23 19:29:28 -05:00 |
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Mattia Bruno
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71034f828e
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attempt to fix broken WilsonExpClover; Compact version still broken will be replaced by F.Joswig
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2022-02-23 01:02:27 +01:00 |
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Peter Boyle
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aab3bcb46f
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Dirichlet first cut - wrong answers on dagger multiply.
Struggling to get a compute node so changing systems
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2022-02-22 19:58:33 +00:00 |
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Mattia Bruno
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11437930c5
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cleaned up definitions of wilsonclover fermions
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2022-02-22 10:45:16 +01:00 |
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Mattia Bruno
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3d44aa9cb9
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cleaned up cloverhelpers; fixed test compact_clover which runs
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2022-02-22 01:10:19 +01:00 |
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Mattia Bruno
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2851870d70
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expClover support via helpers template class
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2022-02-22 00:05:43 +01:00 |
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Peter Boyle
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e8c187b323
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SyCL happier?
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2022-02-15 11:24:38 -05:00 |
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Peter Boyle
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c322420580
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Dont instantiate an Nc=3 and non-GP hardwired code for other implementations
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2022-02-14 16:04:08 +00:00 |
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Daniel Richtmann
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1b6b12589f
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Get splitting up into implementation and instantiation files correct
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2022-02-02 00:51:11 +01:00 |
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Daniel Richtmann
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3082ab8252
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Check in compact version of wilson clover fermions
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2022-02-02 00:50:05 +01:00 |
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Daniel Richtmann
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add86cd7f4
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Abandon ET for clover application, use construct similar to multLink
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2022-02-01 23:09:06 +01:00 |
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Daniel Richtmann
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0b6fd20c54
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Enable memory coalescing in clover term generation
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2022-02-01 23:09:06 +01:00 |
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Daniel Richtmann
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e83423fee6
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Refactor clover to align with other files and prepare for upcoming changes
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2022-02-01 23:09:06 +01:00 |
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RJHudspith
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0bd83cdbda
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Fixes for Nc!=3 Nersc IO, Gauge and Gauge_NCxNC compatible with GLU. Trace normalisation changed in places removing explicit threes. Guards against non-su3 tests and tests failing when LIME is not compiled.
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2021-11-28 21:51:03 +01:00 |
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Alessandro Lupo
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88bdd4344b
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2indx antisymm representation of sp2n
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2021-11-04 18:27:35 +00:00 |
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Peter Boyle
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195ab2888d
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Merge branch 'develop' into develop
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2021-10-27 20:26:57 -04:00 |
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Alessandro Lupo
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4044536eea
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add projection on sp2n algebra
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2021-10-26 10:20:44 +01:00 |
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Alessandro Lupo
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4d8ae6221c
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fix projection
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2021-10-22 10:44:54 +01:00 |
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Peter Boyle
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ba7e371b90
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Warning free compile on Tursa.
Hopefully got all reqd virtual dtors
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2021-10-21 19:56:52 +01:00 |
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Ed Bennett
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f824d99059
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update documentation for GenericHMCRunner
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2021-10-18 09:50:16 +01:00 |
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Alessandro Lupo
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4e31e4e094
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Better tests
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2021-10-13 15:07:23 +01:00 |
|
Alessandro Lupo
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0d6674e489
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hot start for sp2n
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2021-10-12 18:53:54 +01:00 |
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Alessandro Lupo
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b145fd4f5b
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necessary to merge
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2021-10-12 17:08:46 +01:00 |
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Alessandro Lupo
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8a5b794f25
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necessary change to merge with upstrm
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2021-10-12 16:04:03 +01:00 |
|
Alessandro Lupo
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89457e25e3
|
sp fermion instantiation
|
2021-10-12 16:00:32 +01:00 |
|
Alessandro Lupo
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7ff3e5eed4
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gauge and fermion implementation for sp2n
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2021-10-12 16:00:32 +01:00 |
|
Alessandro Lupo
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19eb51cf41
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sp2n generators
|
2021-10-12 15:53:33 +01:00 |
|
Alessandro Lupo
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b6496b6cb5
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sp fermion instantiation
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2021-10-11 16:32:10 +01:00 |
|
Alessandro Lupo
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11fb943b1e
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gauge and fermion implementation for sp2n
|
2021-10-11 16:21:25 +01:00 |
|
Alessandro Lupo
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046a23121e
|
sp2n generators
|
2021-10-05 15:51:22 +01:00 |
|
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a976fa6746
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expose gauge group in GImpl and generic Nc fix
|
2021-10-05 14:19:47 +01:00 |
|
Luchang Jin
|
4b24800132
|
AVX512 drop mixed precision as well
|
2021-09-15 16:29:47 -04:00 |
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Christoph Lehner
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3d0f88e702
|
A64FX drop mixed precision as well
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2021-09-15 18:38:32 +02:00 |
|
Peter Boyle
|
86e33c8ab2
|
Significant GPU perf speed up finished
|
2021-09-14 16:14:23 +01:00 |
|
Peter Boyle
|
a7b943b33e
|
Remove half prec comms
|
2021-09-14 05:05:33 +01:00 |
|
Peter Boyle
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7440cde92f
|
No half prec comms; coalesced access on GPU
|
2021-09-14 05:04:56 +01:00 |
|
Peter Boyle
|
0fc662bb24
|
Dirac cuda 11.4 happy ; force host for functions accessing mult table
ET runs these on host BEFORE lodging result in AST for kernel
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2021-09-14 05:00:44 +01:00 |
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Peter Boyle
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4c88104a73
|
Fix compile warns
|
2021-09-11 23:08:05 +01:00 |
|
Peter Boyle
|
73b944c152
|
Drop half prec comms for now.
|
2021-09-11 23:07:18 +01:00 |
|
Peter Boyle
|
d1b0b7f5c6
|
Half prec comms dropping
|
2021-09-11 23:05:40 +01:00 |
|
Peter Boyle
|
381d8797d0
|
Drop half prec comms for now
|
2021-09-11 23:05:02 +01:00 |
|
Andrew Yong
|
770680669d
|
Whitespace removal.
|
2021-08-04 09:21:59 +01:00 |
|
Andrew Yong
|
0cdfc5cf22
|
Merge remote-tracking branch 'upstream/develop' into develop
|
2021-07-30 14:40:55 +01:00 |
|
u61464
|
8cfc7342cd
|
staggered hand unroll read coalesce
|
2021-05-05 14:17:18 -07:00 |
|
|
cf2923d5dd
|
Jamie's fix
|
2021-04-27 16:53:37 +01:00 |
|
|
009ccd581e
|
bugfix 3D stout smearing
|
2021-04-26 10:36:33 +01:00 |
|
|
54c6b1376d
|
Quick fix of conserved current implementation in CayleyFermion5D. Now function treats current insertion with appropriate periodic boundary conditions in the mu=3 direction.
|
2021-04-21 16:56:46 +01:00 |
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