paboyle
c851b39a49
Nicer way of including aggregate
2018-01-24 13:33:34 +00:00
paboyle
15cc12eb6c
Delete the old non ET file
2018-01-24 13:33:07 +00:00
paboyle
ae4f1f8c12
New file, split out two from Lattice_reduction
2018-01-24 13:32:43 +00:00
paboyle
5609624b44
Threading constructs replaced
2018-01-24 13:32:24 +00:00
paboyle
b5a947dd79
Change to make NVCC happy
2018-01-24 13:32:02 +00:00
paboyle
ee16f62322
stray semicolon elimination. NVCC is picky, but eventually picked up these diags
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with a pragma to suppress
2018-01-24 13:31:17 +00:00
paboyle
3318de27d6
Thread macro changes
2018-01-24 13:30:23 +00:00
paboyle
ac56965306
GPU changes and threading macros replaced
2018-01-24 13:28:30 +00:00
paboyle
8e99264f40
Accelerator mark up of entire tensore space for offload
2018-01-24 13:27:30 +00:00
paboyle
69327db9a9
Improviements for NVCC. Eigen is not compat with CUDA 9 and must hack to disable device
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compilation
2018-01-24 13:25:07 +00:00
paboyle
7331ee2d80
Warnings control to overpower the NVCC compiler
2018-01-24 13:24:36 +00:00
paboyle
918c105c57
NVCC warning elimination
2018-01-24 13:23:59 +00:00
paboyle
be1511d469
Remove old macros for threading
2018-01-24 13:23:24 +00:00
paboyle
f1c31df9d2
updated Eigen version. Still didn't fix CUDA 9 no compile.
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Worked around by switching off __NVCC__ during the include of Eigen and switching it
back on after. No Eigen code can be offloaded, note as a rsult of this. No harm done.
2018-01-24 13:19:29 +00:00
paboyle
ff7b587fad
Ugly... nvcc needs -x cu to compile .cc as cuda.
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Since CXXFLAGS is Also passed to linker, and -x cu breaks link phase must replace
CXX and CXXLD with nvcc -x cu and nvcc -link respectively.
2018-01-24 13:18:19 +00:00
paboyle
4e1135b214
Updated pugixml to v1.8; still didn't fix no compile under nvcc.
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Turns out nvcc was right; must to an explicit template instantiation that was missing
but left gcc, icpc and clang happy for some reason.
Fix this.
2018-01-24 13:17:10 +00:00
paboyle
acd4955a18
remove rdtsc on __NVCC__ as may be device called
2018-01-24 13:16:18 +00:00
paboyle
bd08dc4f45
Pragma use for nvcc, warning elimination.
2018-01-24 13:15:43 +00:00
paboyle
22d137d4e5
Namespace, nvcc warning elimination.
2018-01-24 13:14:43 +00:00
paboyle
87ee592176
Pragma changes and layout and warning elimination for nvcc
2018-01-24 13:14:09 +00:00
paboyle
063603b1ea
Warning elimination
2018-01-24 13:12:14 +00:00
paboyle
f292106db6
Split out pragms from threads.h;
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More work needed; renam threads directory to "parallelism" or something like that
2018-01-24 13:11:04 +00:00
paboyle
9d08aebea9
Compile through nvcc ; warning elimination fixes
2018-01-24 13:09:53 +00:00
paboyle
4e30739093
First compile OK through nvcc on host
2018-01-24 13:08:47 +00:00
a1151fc734
Hadrons: MPI-safe serial IO
2018-01-23 17:26:50 +00:00
James Harrison
ab3baeb38f
Implement contractions and data output in functions; calculate diagrams S, X and 4C separately; output 2E and 2T instead of sunset_shifted, sunset_unshifted, tadpole_shifted, tadpole_unshifted; add comments.
2018-01-23 17:07:45 +00:00
Vera Guelpers
389731d373
changed SeqConservedSummed.hpp to work with new hadrons interface
2018-01-23 10:11:33 +00:00
6e3ce7423e
Hadrons: don't display module list at startup (too long)
2018-01-22 20:04:05 +00:00
15f15a7cfd
Merge branch 'develop' into feature/hadrons
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# Conflicts:
# extras/Hadrons/Modules.hpp
# extras/Hadrons/modules.inc
2018-01-22 20:03:36 +00:00
0e5f626226
Hadrons: module for scalar operator divergence
2018-01-22 19:38:19 +00:00
Daniel Richtmann
04f92ccddf
WilsonMG: Provide a fix for the previous commit; compiles and runs successfully now
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I don't like the solution with the temporary very much though ...
2018-01-22 14:56:48 +01:00
Daniel Richtmann
3b2d805398
WilsonMG: Some first steps towards coarse spin dofs; not compiling yet
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A failing conversion from the innermost type (Grid::Simd<...>) to a coarse
scalar (triple iScalar) in blockPromote prohibits this commit from working.
2018-01-22 12:45:51 +01:00
Azusa Yamaguchi
97b9c6f03d
No option for interior/exterior split of asm kernels since different directions get interleaved
2018-01-22 11:04:19 +00:00
Azusa Yamaguchi
63982819c6
No option to overlap comms and compute for asm implementation since different directions are interleaved
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in the kernels, introducing if else structure would be too painful
2018-01-22 11:03:39 +00:00
Vera Guelpers
6fec507bef
merged new hadrons interface
2018-01-22 10:09:20 +00:00
James Harrison
219b3bd34f
Remove freeVpTensor object
2018-01-19 17:14:11 +00:00
Daniel Richtmann
9dc885d297
Fix a bug in Wilson MG
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The calculation of the lattice size of a second coarse level was incorrect.
2018-01-18 17:02:04 +01:00
Daniel Richtmann
a70c1feecc
Remove some unnecessary stuff in Wilson MG
2018-01-18 15:48:28 +01:00
Daniel Richtmann
38328100c9
Implement correctness checks for Wilson MG
2018-01-18 15:43:15 +01:00
Daniel Richtmann
9732519c41
Apply clang-format to Wilson MG
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I can provide the configuration file I used if people want that.
2018-01-18 15:14:37 +01:00
Daniel Richtmann
fa4eeb28c4
Save current state in Wilson MG test file
2018-01-17 17:56:34 +01:00
Guido Cossu
b00d2d2c39
Correction of Representations compilation and small compilation error for Intel 17
2018-01-17 13:46:12 +00:00
Guido Cossu
f1b3e21830
Merge branch 'feature/clover' into develop
2018-01-17 10:07:42 +00:00
paboyle
90ea472411
Auto emacs format C++ no namespace indent
2018-01-15 11:44:54 +00:00
paboyle
56999474e2
Indent
2018-01-15 11:44:45 +00:00
paboyle
d74c21a386
GLobal edit for QCD namespace removal & NAMESPACE macros
2018-01-15 09:37:58 +00:00
paboyle
ca6bdd7302
Useful drive to emacs C++ mode
2018-01-15 00:24:41 +00:00
paboyle
6f20f1d224
Namespace
2018-01-15 00:24:20 +00:00
paboyle
d0e357ef89
CLeanup and no QCD namespace
2018-01-15 00:23:51 +00:00
paboyle
21251f2e1b
Namespace and formatting changes
2018-01-15 00:21:27 +00:00
