240 Commits

Author	SHA1	Message	Date
Peter Boyle	cf76741ec6	Intel DPCPP Gold happy now (compiles all, runs Benchmark_dwf_fp32 )	2020-12-03 03:47:11 -08:00
Peter Boyle	612e468889	Configurable ALLOC_ALIGN and ALLOC_CACHE	2020-11-20 16:48:28 +01:00
Peter Boyle	804a810d68	Wildcard mismatch	2020-11-18 03:06:53 +00:00
Peter Boyle	aa8aba6543	--shm-force-mpi	2020-11-16 20:15:50 -05:00
Peter Boyle	13df14f96e	Switch off SHM paths with --disable-shm	2020-11-16 18:07:15 -05:00
Peter Boyle	a1063ddbb9	Update options and simplify	2020-11-13 04:11:03 +01:00
Antonin Portelli	6b1486e89b	fixing number of colours defaulting to 4 in most cases	2020-10-08 16:31:24 +01:00
Peter Boyle	d201277652	Expose Nc as a compile time configure option. ... Remove precision option	2020-10-07 13:07:00 -04:00
Peter Boyle	a3e2aeb603	dpcpp options happiness	2020-09-29 06:50:10 -07:00
Peter Boyle	049dd25785	Revert accidental commit thanks michael	2020-09-23 04:13:50 -04:00
Peter Boyle	ecd3f890f5	Merge branch 'develop' of https://github.com/paboyle/Grid into develop	2020-09-16 02:30:14 +01:00
Peter Boyle	e03b64dc06	HIP default flaags to work on ROCM	2020-09-16 00:33:09 +01:00
Peter Boyle	a8309638d4	UVM check in MPI calls	2020-09-03 20:29:26 -04:00
nmeyer-ur	bbd145382b	enable --enable-simd=A64FX in configure	2020-07-08 12:43:51 +02:00
nmeyer-ur	8726e94ea7	merge upstream develop	2020-07-07 20:26:47 +02:00
Peter Boyle	73de335256	Merge branch 'develop' into sycl	2020-06-19 17:44:16 -04:00
Antonin Portelli	0174f5f742	look for librt when using shm=shmopen	2020-06-11 16:50:43 +01:00
Peter Boyle	cdf0a04fc5	Merge branch 'develop' into sycl	2020-06-09 04:00:12 -04:00
Peter Boyle	ebb60330c9	Automatic data motion options beginning	2020-05-17 16:34:25 -04:00
Peter Boyle	bbbee5660d	First compiile on HiP	2020-05-10 05:28:09 -04:00
Peter Boyle	5f780806c2	Merge pull request #279 from paboyle/bugfix/nvcc-config ... configure fix for nvcc with extra arguments as CXX	2020-05-06 10:07:52 -04:00
Peter Boyle	28a1fcaaff	First compile against SYCL	2020-05-05 11:13:27 -07:00
u37294	ff53b231c8	Merge branch 'develop' of https://github.com/paboyle/Grid into develop	2020-05-04 10:25:10 -07:00
u37294	fc19cf905b	Lime optional	2020-05-04 10:24:48 -07:00
Christopher Kelly	dee96cbf82	Added workaround in configure to still catch Cuda compiler when nvcc with extra arguments (eg -ccbin) is used as CXX	2020-04-29 10:37:11 -04:00
nils meyer	345721220e	resolved merge conflict	2020-04-24 10:14:21 +02:00
nils meyer	6db68d6ecb	added SVE configure for armclang and gcc	2020-04-24 10:10:47 +02:00
Michael Marshall	5daf176f4a	Updated to expose GRID_CXXLD in addition to CXXLD. ... NB: CXXLD required as this is what drives linking behaviour.	2020-04-23 15:25:53 +01:00
nmeyer-ur	09f0963d1f	changes in configure.ac ; to be verified	2020-04-23 11:27:03 +02:00
nils meyer	6f44e3c192	reverted changes in configure.ac ; included SVE configure readme	2020-04-23 11:18:50 +02:00
nils meyer	5893888f87	removed default no-strict-aliasing for gcc-10.0.1 exclusively	2020-04-22 19:29:55 +02:00
Antonin Portelli	4e864e56c9	develop pull	2020-04-10 17:19:18 +01:00
Antonin Portelli	6235c7ba98	IPP path fix in configure	2020-03-27 17:23:29 +00:00
Antonin Portelli	7e13724882	removing Hadrons	2020-03-27 12:03:32 +00:00
Peter Boyle	03da4040e2	Make summit happy	2020-01-06 11:47:48 -05:00
Peter Boyle	848079e8ba	Merge pull request #235 from grid-test-organisation/feature/5d-improvement ... MooeeInv and M5D optimisations + enable threading with nvcc	2019-12-10 21:45:03 -05:00
Peter Boyle	e4399e3ee1	--enable-summit flag	2019-11-21 15:02:10 -05:00
Peter Boyle	ec8e060ec7	Summit jsrun GPU mapping updates. Conffigure with --enable-jsrun	2019-10-31 11:46:09 -04:00
gfilaci	0c1efa5235	pass OpenMP flag to host compiler	2019-09-03 12:12:25 +01:00
Peter Boyle	08904f830e	Merge develop	2019-07-16 11:59:56 +01:00
Peter Boyle	fa9cd50c5b	Merge branch 'develop' into feature/gpu-port	2019-07-16 11:55:17 +01:00
Peter Boyle	966a203dcb	Interactions with GPU compilation	2019-07-11 03:16:17 +01:00
Peter Boyle	3e41b1055c	Remove Gpu only kernels.	2019-06-09 11:20:01 +01:00
gfilaci	3f1c4d8789	fix comment hash	2019-05-02 10:24:36 +01:00
Peter Boyle	60330e05a3	NVCC wacky compiler options frozen. Possibly Cuda 9.2 specific	2019-04-28 07:39:33 +01:00
Peter Boyle	04255128ef	HMC directory	2019-02-24 15:22:17 +00:00
Peter Boyle	3eae9a9e3f	update NVCC flags	2019-01-01 13:49:15 +00:00
Peter Boyle	b57a4d32aa	Merge branch 'develop' into feature/gpu-port	2018-12-13 05:11:34 +00:00
Antonin Portelli	6364aa8acf	Merge branch 'feature/contractor' into develop	2018-11-22 15:44:46 +00:00
Antonin Portelli	d77bc88170	Optional support for faster CRC32C checksum through Intel IPP	2018-11-19 17:21:53 +00:00