paboyle
62cf9cf638
Cleaner code
2017-05-30 23:38:02 +01:00
Guido Cossu
15e801af3f
Fixing a compilation error for generic SIMD
2017-05-19 16:39:36 +01:00
paboyle
3267683e22
Union workaround for g++
2017-05-17 11:26:18 +01:00
paboyle
c1c7566089
GCC bug work around in 5.0 through 6.2 inclusive.
2017-05-06 15:20:25 +01:00
Guido Cossu
3344788fa1
Merge branch 'develop' into feature/hmc_generalise
2017-05-01 12:13:56 +01:00
paboyle
56277a11c8
Build a list of whats on the surface
2017-04-24 17:06:15 +01:00
paboyle
736bf3c866
Major rework of stencil. Half precision and MPI3 now working.
2017-04-22 11:33:50 +01:00
paboyle
b9bbe5d188
L1p config bg/q
2017-04-22 11:33:09 +01:00
paboyle
3844bcf800
If no f16c instructions supported must use software half precision conversion.
...
This will also become useful on BG/Q, so will move out from SSE4 into a general area.
Lifted the Eigen half precision from web. Looks sensible, but not extensively regressed
against the intrinsics implementation yet.
2017-04-20 15:30:52 +01:00
paboyle
4a340aa5ca
Massive compressor rework to support reduced precision comms
2017-04-20 09:28:27 +01:00
paboyle
3b7de792d5
Type comparison in the traits work
2017-04-18 13:28:04 +01:00
paboyle
8e161152e4
MultiRHS solver improvements with slice operations moved into lattice and sped up.
...
Block solver requires a lot of performance work.
2017-04-18 10:51:55 +01:00
paboyle
7ede696126
Non compile of tests fixed
2017-04-16 23:40:00 +01:00
paboyle
441a52ee5d
First cut at higher precision reduction
2017-04-15 10:57:21 +01:00
paboyle
3ca41458a3
Fix to no USE_FP16 case
2017-04-14 14:20:54 +01:00
Peter Boyle
951be75292
Half precision conversion working on AVX512 now too
2017-04-13 17:35:11 +01:00
Peter Boyle
b9113ed310
Patches for knl
2017-04-13 12:02:12 -04:00
paboyle
db5ea001a3
Update to use Xcode 8.3 since -mfp16 causes SIGILL
2017-04-13 12:22:40 +01:00
paboyle
1d502e4ed6
FP16 optional compile time
2017-04-13 11:55:24 +01:00
paboyle
73cdf0fffe
Drop f16c from SSE because of a macos compile error on travis
2017-04-13 11:23:41 +01:00
paboyle
94eb829d08
Align cast fixed for __mm128i gcc complained
2017-04-13 08:40:44 +01:00
paboyle
68392ddb5b
Exchange in generic
...
Precision change in AVX, SSE, AVX512, Generic. QPX still to do.
2017-04-13 08:38:12 +01:00
paboyle
cb6b81ae82
Half precision conversion
2017-04-12 19:32:37 +01:00
Guido Cossu
8c540333d5
Merge branch 'develop' into feature/hmc_generalise
2017-04-05 14:41:04 +01:00
Guido Cossu
fd56b3ff38
Merge branch 'develop' into feature/hmc_generalise
2017-03-21 13:33:41 +09:00
paboyle
4ed10a3d06
Merge branch 'develop' into feature/bgq-asm
2017-03-13 11:10:10 +00:00
Lanny91
7fe797daf8
SIMD vector length sanity checks
2017-02-23 16:49:44 +00:00
Lanny91
486a01294a
Corrected QPX SIMD width
2017-02-23 16:47:56 +00:00
paboyle
4e7ab3166f
Refactoring header layout
2017-02-22 18:09:33 +00:00
Lanny91
c80948411b
Added tRotate function and MaddRealPart struct for generic SIMD, bugfix in MultRealPart and minor cosmetic changes.
2017-02-22 14:57:10 +00:00
Lanny91
95625a7bd1
Use Grid Integer type
2017-02-22 13:09:32 +00:00
Lanny91
0796696733
Emulated integer vector type for QPX and generic SIMD instruction sets.
2017-02-22 12:01:36 +00:00
paboyle
661fc4d3d1
Debug AVX512 exchange code paths
2017-02-20 17:48:36 -05:00
paboyle
f246fe3304
Improvements to avx for invertible to avoid latent bug
2017-02-16 23:52:44 +00:00
paboyle
bd600702cf
Vectorise the XYZT face gathering better.
...
Hard coded for simd_layout <= 2 in any given spread out direction; full generality is inconsistent
with efficiency.
2017-02-15 11:11:04 +00:00
paboyle
0883d6a7ce
Overlap comms compute support; make reg naming consistent with bgq aasm
2017-02-07 00:59:32 -05:00
paboyle
4bbdfb434c
Overlap comms compute modifications
2017-02-07 00:57:01 -05:00
Guido Cossu
17629b8d9e
Merge branch 'develop' into feature/hmc_generalise
2017-01-25 11:33:53 +00:00
Peter Boyle
c3b6d573b9
Merge branch 'feature/bgq-asm' of https://github.com/paboyle/Grid into feature/bgq-asm
2016-12-30 22:42:17 +00:00
Peter Boyle
1e179c903d
Worried about integer; suspect where statements are broken
2016-12-27 17:46:38 +00:00
Peter Boyle
1caa3fbc2d
LOCK UNLOCK only
2016-12-27 11:24:45 +00:00
Peter Boyle
eabf316ed9
BGQ performance ASM
2016-12-22 21:56:08 +00:00
Peter Boyle
7dc36628a1
QPX finishing
2016-12-22 17:50:48 +00:00
Guido Cossu
ce1a115e0b
Removing redundant arguments for integrator functions, step 1
2016-12-20 17:51:30 +00:00
paboyle
3f2d53a994
BGQ assembler beginning
2016-12-20 10:21:26 +00:00
paboyle
4b220972ac
Warning fix
2016-12-18 02:14:17 +00:00
paboyle
629f43e36c
Return statement needed
2016-12-18 02:09:37 +00:00
paboyle
a3172b3455
Precision error
2016-12-18 02:07:45 +00:00
paboyle
f17436fec2
Bad commit fixed
2016-12-18 01:27:34 +00:00
Guido Cossu
0bd296dda4
Adding check of the Dag part in the benchmark
2016-12-14 03:15:09 +00:00
Peter Boyle
69ae817d1c
Updates for supporting Mobius better
2016-12-08 16:43:28 +00:00
Guido Cossu
b812d5e39c
Added single threaded version of the derivative for the Ls vectorised DWF
2016-12-06 16:31:13 +00:00
Peter Boyle
e27c6b217c
Updating
2016-12-01 12:42:53 +00:00
paboyle
6adf35da54
Faster Mobius
2016-12-01 11:39:04 +00:00
Lanny91
b18950f776
Added simd real divide test with QPX divide fixes
2016-11-25 13:21:33 +00:00
Lanny91
0acbf77bc6
Add QPX Div structure
2016-11-24 13:24:12 +00:00
a2cffb0304
AVXFMA target fixed
2016-11-21 17:47:18 +01:00
97cddda49e
Merge branch 'feature/gen-simd' into feature/doxygen
...
# Conflicts:
# Makefile.am
# configure.ac
2016-11-19 13:11:13 +01:00
b873504b90
fully generic SIMD
2016-11-19 01:32:39 +01:00
042ae5b87c
generic 256bits SIMD
2016-11-15 12:16:15 +00:00
azusayamaguchi
f7b60004f3
Merge branch 'develop' into release/v0.6.0
2016-11-04 16:08:07 +00:00
d5e95bc350
Merge branch 'release/v0.6.0' into feature/feynman-rules
2016-10-31 18:36:21 +00:00
Guido Cossu
e1042aef77
First version of the doube prec for testing purposes
...
It does not compile single and double version at the same time
2016-10-28 17:20:04 +01:00
paboyle
aa6a839c60
avx512 build fix; detect clang/gcc intrinsics vs. ICPC
2016-10-28 09:13:09 +01:00
ca21003f01
Merge branch 'feature/fft-opt' into feature/feynman-rules
...
# Conflicts:
# lib/FFT.h
# lib/qcd/action/fermion/WilsonFermion5D.h
# tests/core/Test_fft.cc
2016-10-26 18:44:47 +01:00
azusayamaguchi
460d0753a1
Merge branch 'develop' into feature/mpi3
...
Conflicts:
lib/simd/Grid_avx512.h
2016-10-25 01:08:51 +01:00
azusayamaguchi
75ebd3a0d1
Typo fixes and rotate for CLANG
2016-10-21 22:34:29 +01:00
bd6a228af6
Merge commit '20a091c3eddfdb67a82ece6413740a93650a2f98' into feature/feynman-rules
2016-10-21 13:10:30 +01:00
azusayamaguchi
20a091c3ed
Intel vs. Clang intrinsics differences absorbed
2016-10-21 09:08:36 +01:00
997fd882ff
Merge branch 'develop' into feature/feynman-rules
...
# Conflicts:
# lib/Threads.h
# lib/qcd/action/fermion/WilsonFermion.cc
# lib/qcd/action/fermion/WilsonFermion.h
# lib/qcd/utils/SUn.h
# lib/simd/Grid_avx.h
# lib/simd/Intel512common.h
2016-10-19 18:35:18 +01:00
paboyle
811ca45473
GNU clang hack for AVX512 since there are missing reduce intrinsics in Clang 3.9 and GCC-6 AVX512 support
2016-10-17 16:23:21 +01:00
azusayamaguchi
81f2aeaece
KNL streaming stores, and KNL performance coutners
2016-10-12 11:45:22 +01:00
paboyle
6f408256bc
FMA4 option moved on the align
2016-10-11 10:03:01 +01:00
paboyle
8d11681aac
verbose remove
2016-10-10 23:50:42 +01:00
paboyle
3d5c9a1ee9
No compile fix on clang++ 3.9
2016-10-10 23:50:13 +01:00
Guido Cossu
611b5d74ba
Fix for AVX+FMA3 compilation
2016-10-10 15:26:17 +01:00
cb02b7088f
Merge branch 'develop' into feature/doxygen
...
# Conflicts:
# configure.ac
2016-10-09 13:35:44 +01:00
paboyle
87acd06990
Use streaming stores
2016-09-26 10:11:34 +01:00
paboyle
836e929565
Divide handling improved
2016-09-26 09:42:22 +01:00
Antonin Portelli
0724f7af75
QPX single precision implementation
2016-09-19 18:09:12 +01:00
4d11a6f5f2
first commit for QPX intrinsics
2016-08-23 14:41:44 +01:00
paboyle
17097a93ec
FFTW test ran over 4 mpi processes.
2016-08-17 01:33:55 +01:00
b1cfb4d661
first try at a nicer Doxygen implementation
2016-08-05 15:29:18 +01:00
93d29bb699
build system improvements after discussion with Peter
2016-08-04 16:19:59 +01:00
e9f30cab2c
first working version for the new build system
2016-07-30 17:53:18 +01:00
paboyle
4908b77d46
Fixed conflicts. PLEASE avoid making wholesale cosmetic only changes, this created
...
a HUGE amount of difficult to resolve and understand conflicts .
Wholesale formatting, reordering functions etc... in a central file like Tensor_class
or Grid_vector_types while others are also editing without making substantial functionality
changes creates pain.
2016-07-15 20:59:07 +01:00
paboyle
f4dd5062d7
Merge branch 'develop' of https://github.com/paboyle/Grid into develop
2016-07-15 19:26:06 +01:00
paboyle
8f47d0b5ab
Rotation needed for hopping term in fifth dim with Ls vectorised fields
2016-07-14 23:45:36 +01:00
paboyle
a0676beeb1
Open up dependency on Eigen and FFTW
2016-07-07 22:31:07 +01:00
Guido Cossu
e3d5319470
Debugged the real() and imag() functions and added tests to Test_Simd
2016-07-06 14:16:03 +01:00
Guido Cossu
fdfbf11c6d
Merge branch 'develop' into temporary-smearing
2016-07-04 18:45:10 +01:00
Guido Cossu
9cb90f714e
Merge remote-tracking branch 'origin/develop' into temporary-smearing
2016-07-04 17:28:40 +01:00
Guido Cossu
1a6d65c6a4
Converted set_uw and set_fj to all complex functions
2016-07-03 10:27:43 +01:00
paboyle
bdaa5b1767
Updated to have perfect prefetching for the s-vectorised kernel with any cache blocking.
2016-06-30 14:35:02 -07:00
paboyle
8fcefc021a
Improved the prefetching when using cache blocking codes
2016-06-30 14:35:02 -07:00
paboyle
1445189361
COntrol the prefetch strategy
2016-06-30 14:35:02 -07:00
paboyle
a25bec87d9
Prefetch during save
2016-06-30 14:35:01 -07:00
paboyle
2d8bb4c594
Tweaks
2016-06-30 14:35:01 -07:00
paboyle
6d58cb2a68
Enable reordering of the loops in the assembler for cache friendly.
...
This gets in the way of L2 prefetching however. Do next next link in stencil
prefetching.
2016-06-30 14:35:01 -07:00
paboyle
87418e7df1
Slightly faster prefetching perf.
2016-06-13 02:32:52 -07:00
